From 02f6c664cc2ea904245a890fe4447168894502aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fran=C3=A7ois=20Revol?= Date: Fri, 29 Aug 2014 11:41:18 +0200 Subject: [PATCH] pc_serial: try to enable 64 byte FIFO We should probably detect the UART type properly first, but the IRQ handler also checks for the available FIFO length anyway. --- src/add-ons/kernel/drivers/ports/pc_serial/SerialDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/add-ons/kernel/drivers/ports/pc_serial/SerialDevice.cpp b/src/add-ons/kernel/drivers/ports/pc_serial/SerialDevice.cpp index d27a8303bb..ad83803b3e 100644 --- a/src/add-ons/kernel/drivers/ports/pc_serial/SerialDevice.cpp +++ b/src/add-ons/kernel/drivers/ports/pc_serial/SerialDevice.cpp @@ -155,7 +155,7 @@ SerialDevice::SetModes(struct termios *tios) } else { // set FCR now, // 16650 and later chips have another reg at 2 when DLAB=1 - uint8 fcr = FCR_ENABLE | FCR_RX_RST | FCR_TX_RST | FCR_F_8; + uint8 fcr = FCR_ENABLE | FCR_RX_RST | FCR_TX_RST | FCR_F_8 | FCR_F64EN; // enable fifo //fcr = 0; WriteReg8(FCR, fcr);