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Merge branch 'master' into x86_64

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This commit is contained in:
Alex Smith
2012-06-11 12:01:35 +01:00
parent 65ad1ba320 30e7dbeb72
commit 07b33113a3
80 changed files with 4036 additions and 556 deletions
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headers/os/kernel/OS.h
+58 -31
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@@ -494,7 +494,7 @@ typedef enum cpu_types {
B_CPU_INTEL_PENTIUM_M = 0x1069,
B_CPU_INTEL_PENTIUM_III_XEON = 0x106a,
B_CPU_INTEL_PENTIUM_III_MODEL_11 = 0x106b,
B_CPU_INTEL_ATOM = 0x1106c,
B_CPU_INTEL_ATOM = 0x1106c,
B_CPU_INTEL_PENTIUM_M_MODEL_13 = 0x106d, /* Dothan */
B_CPU_INTEL_PENTIUM_CORE,
B_CPU_INTEL_PENTIUM_CORE_2,
@@ -513,15 +513,14 @@ typedef enum cpu_types {
/* AMD */
/* Checked with "AMD Processor Recognition Application Note"
* (Table 3)
* 20734.pdf
*/
// AMD Processor Recognition Application Note
B_CPU_AMD_x86 = 0x1100,
// Family 5h
B_CPU_AMD_K5_MODEL_0 = 0x1150,
B_CPU_AMD_K5_MODEL_1,
B_CPU_AMD_K5_MODEL_2,
B_CPU_AMD_K5_MODEL_3,
B_CPU_AMD_K5_MODEL_1 = 0x1151,
B_CPU_AMD_K5_MODEL_2 = 0x1152,
B_CPU_AMD_K5_MODEL_3 = 0x1153,
B_CPU_AMD_K6_MODEL_6 = 0x1156,
B_CPU_AMD_K6_MODEL_7 = 0x1157,
B_CPU_AMD_K6_MODEL_8 = 0x1158,
@@ -530,42 +529,70 @@ typedef enum cpu_types {
B_CPU_AMD_K6_III = 0x1159,
B_CPU_AMD_K6_III_MODEL_13 = 0x115d,
B_CPU_AMD_GEODE_LX = 0x115a,
// Family 6h
B_CPU_AMD_ATHLON_MODEL_1 = 0x1161,
B_CPU_AMD_ATHLON_MODEL_2 = 0x1162,
B_CPU_AMD_DURON = 0x1163,
B_CPU_AMD_ATHLON_THUNDERBIRD = 0x1164,
B_CPU_AMD_ATHLON_XP = 0x1166,
B_CPU_AMD_ATHLON_XP_MODEL_7,
B_CPU_AMD_ATHLON_XP_MODEL_8,
B_CPU_AMD_ATHLON_XP_MODEL_6 = 0x1166,
B_CPU_AMD_ATHLON_XP_MODEL_7 = 0x1167,
B_CPU_AMD_ATHLON_XP_MODEL_8 = 0x1168,
B_CPU_AMD_ATHLON_XP_MODEL_10 = 0x116a, /* Barton */
B_CPU_AMD_SEMPRON_MODEL_8 = B_CPU_AMD_ATHLON_XP_MODEL_8,
B_CPU_AMD_SEMPRON_MODEL_10 = B_CPU_AMD_ATHLON_XP_MODEL_10,
/* According to "Revision Guide for AMD Family 10h
* Processors" (41322.pdf)
*/
B_CPU_AMD_PHENOM = 0x11f2,
/* According to "Revision guide for AMD Athlon 64
* and AMD Opteron Processors" (25759.pdf)
*/
// Family fh
B_CPU_AMD_ATHLON_64_MODEL_3 = 0x11f3,
B_CPU_AMD_ATHLON_64_MODEL_4,
B_CPU_AMD_ATHLON_64_MODEL_5,
B_CPU_AMD_PHENOM_II = B_CPU_AMD_ATHLON_64_MODEL_4,
B_CPU_AMD_OPTERON = B_CPU_AMD_ATHLON_64_MODEL_5,
B_CPU_AMD_ATHLON_64_FX = B_CPU_AMD_ATHLON_64_MODEL_5,
B_CPU_AMD_ATHLON_64_MODEL_4 = 0x11f4,
B_CPU_AMD_ATHLON_64_MODEL_7 = 0x11f7,
B_CPU_AMD_ATHLON_64_MODEL_8,
B_CPU_AMD_ATHLON_64_MODEL_8 = 0x11f8,
B_CPU_AMD_ATHLON_64_MODEL_11 = 0x11fb,
B_CPU_AMD_ATHLON_64_MODEL_12,
B_CPU_AMD_ATHLON_64_MODEL_12 = 0x11fc,
B_CPU_AMD_ATHLON_64_MODEL_14 = 0x11fe,
B_CPU_AMD_ATHLON_64_MODEL_15,
B_CPU_AMD_ATHLON_64_MODEL_15 = 0x11ff,
B_CPU_AMD_ATHLON_64_MODEL_20 = 0x111f4,
B_CPU_AMD_ATHLON_64_MODEL_23 = 0x111f7,
B_CPU_AMD_ATHLON_64_MODEL_24 = 0x111f8,
B_CPU_AMD_ATHLON_64_MODEL_27 = 0x111fb,
B_CPU_AMD_ATHLON_64_MODEL_28 = 0x111fc,
B_CPU_AMD_ATHLON_64_MODEL_31 = 0x111ff,
B_CPU_AMD_ATHLON_64_MODEL_35 = 0x211f3,
B_CPU_AMD_ATHLON_64_MODEL_43 = 0x211fb,
B_CPU_AMD_ATHLON_64_MODEL_44 = 0x211fc,
B_CPU_AMD_ATHLON_64_MODEL_47 = 0x211ff,
B_CPU_AMD_ATHLON_64_MODEL_63 = 0x311ff,
B_CPU_AMD_ATHLON_64_MODEL_79 = 0x411ff,
B_CPU_AMD_ATHLON_64_MODEL_95 = 0x511ff,
B_CPU_AMD_ATHLON_64_MODEL_127 = 0x711ff,
B_CPU_AMD_GEODE_LX = 0x115a,
B_CPU_AMD_OPTERON_MODEL_5 = 0x11f5,
B_CPU_AMD_OPTERON_MODEL_21 = 0x111f5,
B_CPU_AMD_OPTERON_MODEL_33 = 0x211f1,
B_CPU_AMD_OPTERON_MODEL_37 = 0x211f5,
B_CPU_AMD_OPTERON_MODEL_39 = 0x211f7,
B_CPU_AMD_TURION_64_MODEL_36 = 0x211f4,
B_CPU_AMD_TURION_64_MODEL_76 = 0x411fc,
B_CPU_AMD_TURION_64_MODEL_104 = 0x611f8,
// Family 10h
B_CPU_AMD_PHENOM_MODEL_2 = 0x1011f2,
B_CPU_AMD_PHENOM_II_MODEL_4 = 0x1011f4,
B_CPU_AMD_PHENOM_II_MODEL_5 = 0x1011f5,
B_CPU_AMD_PHENOM_II_MODEL_6 = 0x1011f6,
B_CPU_AMD_PHENOM_II_MODEL_10 = 0x1011fa,
// Family 12h
B_CPU_AMD_A_SERIES = 0x3011f1,
// Family 14h
B_CPU_AMD_C_SERIES = 0x5011f1,
B_CPU_AMD_E_SERIES = 0x5011f2,
// Family 15h
B_CPU_AMD_FX_SERIES = 0x6011f1, /* Bulldozer */
/* VIA/Cyrix */
B_CPU_CYRIX_x86 = 0x1200,
headers/private/drivers/scsi_cmds.h
+23
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@@ -196,6 +196,7 @@
#define SCSI_OP_READ_16 0x88
#define SCSI_OP_WRITE_16 0x8a
#define SCSI_OP_VERIFY_16 0x8f
#define SCSI_OP_WRITE_SAME_16 0x93
#define SCSI_OP_SERVICE_ACTION_IN 0x9e
#define SCSI_OP_SERVICE_ACTION_OUT 0x9f
#define SCSI_OP_MOVE_MEDIUM 0xa5
@@ -435,6 +436,28 @@ typedef struct scsi_cmd_rw_16 {
} _PACKED scsi_cmd_rw_16;
// WRITE SAME (16)
typedef struct scsi_cmd_wsame_16 {
uint8 opcode;
LBITFIELD8_6(
_res1_0 : 1,
lb_data : 1,
pb_data : 1,
unmap : 1,
_res1_4 : 1,
write_protect : 3
);
uint64 lba;
uint32 length;
LBITFIELD8_2(
group_number : 5,
_res14_5 : 3
);
uint8 control;
} _PACKED scsi_cmd_wsame_16;
// REQUEST SENSE
typedef struct scsi_cmd_request_sense {
headers/private/graphics/intel_810/DriverInterface.h
+108
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@@ -0,0 +1,108 @@
/*
* Copyright 2007-2012 Haiku, Inc. All rights reserved.
* Distributed under the terms of the MIT license.
*
* Authors:
* Gerald Zajac
*/
#ifndef DRIVERINTERFACE_H
#define DRIVERINTERFACE_H
#include <Accelerant.h>
#include <GraphicsDefs.h>
#include <Drivers.h>
#include <edid.h>
// This file contains info that is shared between the kernel driver and the
// accelerant, and info that is shared among the source files of the
// accelerant.
#define ENABLE_DEBUG_TRACE // if defined, turns on debug output to syslog
#define ARRAY_SIZE(a) (int(sizeof(a) / sizeof(a[0]))) // get number of elements in an array
struct Benaphore {
sem_id sem;
int32 count;
status_t Init(const char* name)
{
count = 0;
sem = create_sem(0, name);
return sem < 0 ? sem : B_OK;
}
status_t Acquire()
{
if (atomic_add(&count, 1) > 0)
return acquire_sem(sem);
return B_OK;
}
status_t Release()
{
if (atomic_add(&count, -1) > 1)
return release_sem(sem);
return B_OK;
}
void Delete() { delete_sem(sem); }
};
enum {
INTEL_GET_SHARED_DATA = B_DEVICE_OP_CODES_END + 234,
INTEL_DEVICE_NAME,
INTEL_GET_EDID,
};
struct DisplayModeEx : display_mode {
uint8 bitsPerPixel;
uint8 bytesPerPixel;
uint16 bytesPerRow; // number of bytes in one line/row
};
struct SharedInfo {
// Device ID info.
uint16 vendorID; // PCI vendor ID, from pci_info
uint16 deviceID; // PCI device ID, from pci_info
uint8 revision; // PCI device revsion, from pci_info
char chipName[32]; // user recognizable name of chip
bool bAccelerantInUse; // true = accelerant has been initialized
// Memory mappings.
area_id regsArea; // area_id for the memory mapped registers. It
// will be cloned into accelerant address space.
area_id videoMemArea; // addr shared with all teams.
addr_t videoMemAddr; // virtual video memory addr
phys_addr_t videoMemPCI; // physical video memory addr
uint32 videoMemSize; // video memory size in bytes (for frame buffer)
uint32 maxFrameBufferSize; // max available video memory for frame buffer
// Color spaces supported by current video chip/driver.
color_space colorSpaces[6];
uint32 colorSpaceCount; // number of color spaces in array colorSpaces
// List of screen modes.
area_id modeArea; // area containing list of display modes
uint32 modeCount; // number of display modes in the list
DisplayModeEx displayMode; // current display mode configuration
edid1_info edidInfo;
bool bHaveEDID; // true = EDID info from device is in edidInfo
Benaphore engineLock; // serializing access to the acceleration engine
};
#endif // DRIVERINTERFACE_H
headers/private/kernel/arch/arm/bcm2708.h
+1 -3
View File
@@ -62,9 +62,7 @@
// SMI Base
#define USB_BASE 0x980000
// USB Controller, 15.2, page 202
#define FB_BASE 0x000000
// Fake frame buffer
#define FB_SIZE SIZE_4K
// FB_BASE will depend on memory split
// 7.5, page 112
headers/private/kernel/arch/ppc/arch_cpu.h
+2
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@@ -187,8 +187,10 @@ enum ppc_processor_version {
IBMPOWER3 = 0x0041,
MPC860 = 0x0050,
MPC8240 = 0x0081,
AMCC460EX = 0x1302,
IBM405GP = 0x4011,
IBM405L = 0x4161,
AMCC440EP = 0x4222,
IBM750FX = 0x7000,
MPC7450 = 0x8000,
MPC7455 = 0x8001,
headers/private/kernel/arch/ppc/board/sam460ex/board_config.h
+3
View File
@@ -11,6 +11,9 @@
#define BOARD_NAME_PRETTY "ACube Sam460ex"
#define BOARD_CPU_TYPE_PPC440 1
#define BOARD_CPU_PPC460EX 1
// UART Settings
// TODO: use the FDT instead of hardcoding
#define BOARD_UART1_BASE 0xef600300
headers/private/shared/cpu_type.h
+44 -7
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@@ -232,33 +232,70 @@ get_cpu_model_string(system_info *info)
case B_CPU_AMD_K6_III:
case B_CPU_AMD_K6_III_MODEL_13:
return "K6-III";
case B_CPU_AMD_GEODE_LX:
return "Geode LX";
case B_CPU_AMD_ATHLON_MODEL_1:
case B_CPU_AMD_ATHLON_MODEL_2:
case B_CPU_AMD_ATHLON_THUNDERBIRD:
return "Athlon";
case B_CPU_AMD_ATHLON_XP:
case B_CPU_AMD_ATHLON_XP_MODEL_6:
case B_CPU_AMD_ATHLON_XP_MODEL_7:
case B_CPU_AMD_ATHLON_XP_MODEL_8:
case B_CPU_AMD_ATHLON_XP_MODEL_10:
return "Athlon XP";
case B_CPU_AMD_DURON:
case B_CPU_AMD_ATHLON_XP_MODEL_7:
return "Duron";
case B_CPU_AMD_ATHLON_64_MODEL_3:
case B_CPU_AMD_ATHLON_64_MODEL_4:
case B_CPU_AMD_ATHLON_64_MODEL_7:
case B_CPU_AMD_ATHLON_64_MODEL_8:
case B_CPU_AMD_ATHLON_64_MODEL_11:
case B_CPU_AMD_ATHLON_64_MODEL_12:
case B_CPU_AMD_ATHLON_64_MODEL_14:
case B_CPU_AMD_ATHLON_64_MODEL_15:
case B_CPU_AMD_ATHLON_64_MODEL_20:
case B_CPU_AMD_ATHLON_64_MODEL_23:
case B_CPU_AMD_ATHLON_64_MODEL_24:
case B_CPU_AMD_ATHLON_64_MODEL_27:
case B_CPU_AMD_ATHLON_64_MODEL_28:
case B_CPU_AMD_ATHLON_64_MODEL_31:
case B_CPU_AMD_ATHLON_64_MODEL_35:
case B_CPU_AMD_ATHLON_64_MODEL_43:
case B_CPU_AMD_ATHLON_64_MODEL_44:
case B_CPU_AMD_ATHLON_64_MODEL_47:
case B_CPU_AMD_ATHLON_64_MODEL_63:
case B_CPU_AMD_ATHLON_64_MODEL_79:
case B_CPU_AMD_ATHLON_64_MODEL_95:
case B_CPU_AMD_ATHLON_64_MODEL_127:
return "Athlon 64";
case B_CPU_AMD_OPTERON:
case B_CPU_AMD_OPTERON_MODEL_5:
case B_CPU_AMD_OPTERON_MODEL_21:
case B_CPU_AMD_OPTERON_MODEL_33:
case B_CPU_AMD_OPTERON_MODEL_37:
case B_CPU_AMD_OPTERON_MODEL_39:
return "Opteron";
case B_CPU_AMD_PHENOM:
case B_CPU_AMD_TURION_64_MODEL_36:
case B_CPU_AMD_TURION_64_MODEL_76:
case B_CPU_AMD_TURION_64_MODEL_104:
return "Turion 64";
case B_CPU_AMD_PHENOM_MODEL_2:
return "Phenom";
case B_CPU_AMD_PHENOM_II:
case B_CPU_AMD_PHENOM_II_MODEL_4:
case B_CPU_AMD_PHENOM_II_MODEL_5:
case B_CPU_AMD_PHENOM_II_MODEL_6:
case B_CPU_AMD_PHENOM_II_MODEL_10:
get_cpuid_model_string(cpuidName);
if (strcasestr(cpuidName, "Athlon") != NULL)
return "Athlon II";
return "Phenom II";
case B_CPU_AMD_GEODE_LX:
return "Geode LX";
case B_CPU_AMD_A_SERIES:
return "A-Series";
case B_CPU_AMD_C_SERIES:
return "C-Series";
case B_CPU_AMD_E_SERIES:
return "E-Series";
case B_CPU_AMD_FX_SERIES:
return "FX-Series";
/* Transmeta */
case B_CPU_TRANSMETA_CRUSOE: