diff --git a/headers/private/kernel/arch/cpu.h b/headers/private/kernel/arch/cpu.h
index e1bf1fdb5e..4d5754ef10 100644
--- a/headers/private/kernel/arch/cpu.h
+++ b/headers/private/kernel/arch/cpu.h
@@ -55,4 +55,6 @@ void arch_cpu_memory_read_write_barrier(void);
 
 #include <arch_cpu.h>
 
+#define CACHE_LINE_ALIGN	 __attribute__((aligned(CACHE_LINE_SIZE)))
+
 #endif /* _KERNEL_ARCH_CPU_H */
diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h
index 33cf17e4ae..eb2e24a8cf 100644
--- a/headers/private/kernel/arch/x86/arch_cpu.h
+++ b/headers/private/kernel/arch/x86/arch_cpu.h
@@ -26,6 +26,8 @@
 
 #define CPU_MAX_CACHE_LEVEL	8
 
+#define CACHE_LINE_SIZE		64
+
 
 // MSR registers (possibly Intel specific)
 #define IA32_MSR_TSC					0x10
diff --git a/headers/private/kernel/cpu.h b/headers/private/kernel/cpu.h
index 4a70428350..27fb6ff857 100644
--- a/headers/private/kernel/cpu.h
+++ b/headers/private/kernel/cpu.h
@@ -86,7 +86,7 @@ typedef struct cpu_ent {
 
 	// arch-specific stuff
 	arch_cpu_info 	arch;
-} cpu_ent __attribute__((aligned(64)));
+} cpu_ent CACHE_LINE_ALIGN;
 
 
 //extern cpu_ent gCPU[MAX_BOOT_CPUS];
diff --git a/src/system/kernel/scheduler/scheduler_common.h b/src/system/kernel/scheduler/scheduler_common.h
index 2f24441855..dc07cf5bac 100644
--- a/src/system/kernel/scheduler/scheduler_common.h
+++ b/src/system/kernel/scheduler/scheduler_common.h
@@ -18,9 +18,6 @@
 #include "RunQueue.h"
 
 
-#define CACHE_LINE_ALIGN	 __attribute__((aligned(64)))
-
-
 //#define TRACE_SCHEDULER
 #ifdef TRACE_SCHEDULER
 #	define TRACE(...) dprintf_no_syslog(__VA_ARGS__)