diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h
index 41781e7e4c..c1b8869005 100644
--- a/headers/private/kernel/arch/x86/arch_cpu.h
+++ b/headers/private/kernel/arch/x86/arch_cpu.h
@@ -382,7 +382,10 @@
 #define IA32_FEATURE_XSAVES			(1 << 3) // XSAVES and XRSTORS Instruction
 
 // x86 defined features from cpuid eax 0x80000007, edx register
+#define IA32_FEATURE_AMD_HW_PSTATE		(1 << 7)
 #define IA32_FEATURE_INVARIANT_TSC		(1 << 8)
+#define IA32_FEATURE_CPB				(1 << 9)
+#define IA32_FEATURE_PROC_FEEDBACK		(1 << 11)
 
 // x86 defined features from cpuid eax 0x80000008, ebx register
 #define IA32_FEATURE_CLZERO			(1 << 0)	// CLZERO instruction
diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp b/src/system/kernel/arch/x86/arch_cpu.cpp
index 455dcb8fa0..3e44407ac1 100644
--- a/src/system/kernel/arch/x86/arch_cpu.cpp
+++ b/src/system/kernel/arch/x86/arch_cpu.cpp
@@ -656,6 +656,14 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
 		strlcat(features, "msr_arch ", sizeof(features));
 	if (cpu->arch.feature[FEATURE_7_EDX] & IA32_FEATURE_SSBD)
 		strlcat(features, "ssbd ", sizeof(features));
+	if (cpu->arch.feature[FEATURE_EXT_7_EDX] & IA32_FEATURE_AMD_HW_PSTATE)
+		strlcat(features, "hwpstate ", sizeof(features));
+	if (cpu->arch.feature[FEATURE_EXT_7_EDX] & IA32_FEATURE_INVARIANT_TSC)
+		strlcat(features, "constant_tsc ", sizeof(features));
+	if (cpu->arch.feature[FEATURE_EXT_7_EDX] & IA32_FEATURE_CPB)
+		strlcat(features, "cpb ", sizeof(features));
+	if (cpu->arch.feature[FEATURE_EXT_7_EDX] & IA32_FEATURE_PROC_FEEDBACK)
+		strlcat(features, "proc_feedback ", sizeof(features));
 	if (cpu->arch.feature[FEATURE_D_1_EAX] & IA32_FEATURE_XSAVEOPT)
 		strlcat(features, "xsaveopt ", sizeof(features));
 	if (cpu->arch.feature[FEATURE_D_1_EAX] & IA32_FEATURE_XSAVEC)