Applied patch by Gerald Zajac: Adds hardware overlay support to the ATI
mach64/Rage driver. Resolves #5314. Thanks! git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42335 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -1,9 +1,9 @@
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/*
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/*
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Copyright 2007-2009 Haiku, Inc. All rights reserved.
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Copyright 2007-2011 Haiku, Inc. All rights reserved.
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Distributed under the terms of the MIT license.
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Distributed under the terms of the MIT license.
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Authors:
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Authors:
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Gerald Zajac 2007-2009
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Gerald Zajac
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*/
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*/
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#ifndef DRIVERINTERFACE_H
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#ifndef DRIVERINTERFACE_H
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@@ -14,6 +14,7 @@
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#include <GraphicsDefs.h>
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#include <GraphicsDefs.h>
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#include <Drivers.h>
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#include <Drivers.h>
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#include <edid.h>
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#include <edid.h>
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#include <video_overlay.h>
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// This file contains info that is shared between the kernel driver and the
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// This file contains info that is shared between the kernel driver and the
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@@ -163,6 +164,12 @@ struct DisplayModeEx : display_mode {
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};
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};
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struct OverlayBuffer : overlay_buffer {
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OverlayBuffer* nextBuffer; // pointer to next buffer in chain, NULL = none
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uint32 size; // size of overlay buffer
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};
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struct SharedInfo {
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struct SharedInfo {
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// Device ID info.
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// Device ID info.
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uint16 vendorID; // PCI vendor ID, from pci_info
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uint16 vendorID; // PCI vendor ID, from pci_info
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@@ -180,8 +187,8 @@ struct SharedInfo {
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area_id regsArea; // area_id for the memory mapped registers. It will
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area_id regsArea; // area_id for the memory mapped registers. It will
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// be cloned into accelerant's address space.
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// be cloned into accelerant's address space.
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area_id videoMemArea; // video memory area_id. The addresses are shared with all teams.
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area_id videoMemArea; // video memory area_id. The addresses are shared with all teams.
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void* videoMemAddr; // video memory addr as viewed from virtual memory
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addr_t videoMemAddr; // video memory addr as viewed from virtual memory
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void* videoMemPCI; // video memory addr as viewed from the PCI bus (for DMA)
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phys_addr_t videoMemPCI; // video memory addr as viewed from the PCI bus (for DMA)
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uint32 videoMemSize; // video memory size in bytes.
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uint32 videoMemSize; // video memory size in bytes.
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uint32 cursorOffset; // offset of cursor in video memory
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uint32 cursorOffset; // offset of cursor in video memory
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@@ -209,6 +216,11 @@ struct SharedInfo {
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bool bHaveEDID; // true = EDID info from device is in edidInfo
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bool bHaveEDID; // true = EDID info from device is in edidInfo
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Benaphore engineLock; // for serializing access to the acceleration engine
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Benaphore engineLock; // for serializing access to the acceleration engine
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Benaphore overlayLock; // for overlay operations
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int32 overlayAllocated; // non-zero if overlay is allocated
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uint32 overlayToken;
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OverlayBuffer* overlayBuffer; // pointer to linked list of buffers; NULL = none
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MonitorType displayType;
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MonitorType displayType;
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@@ -227,7 +239,7 @@ struct SharedInfo {
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R128_RAMSpec r128MemSpec; // Rage128 memory timing spec's
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R128_RAMSpec r128MemSpec; // Rage128 memory timing spec's
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R128_PLLParams r128PLLParams; // Rage128 PLL parameters from video BIOS ROM
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R128_PLLParams r128PLLParams; // Rage128 PLL parameters from video BIOS ROM
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uint32 r128_dpGuiMasterCntl; // flags for accelerated drawing
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uint32 r128_dpGuiMasterCntl; // flags for accelerated drawing
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};
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};
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@@ -10,12 +10,14 @@ Addon ati.accelerant :
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engine.cpp
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engine.cpp
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hooks.cpp
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hooks.cpp
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mode.cpp
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mode.cpp
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overlay.cpp
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mach64_cursor.cpp
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mach64_cursor.cpp
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mach64_dpms.cpp
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mach64_dpms.cpp
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mach64_draw.cpp
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mach64_draw.cpp
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mach64_init.cpp
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mach64_init.cpp
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mach64_mode.cpp
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mach64_mode.cpp
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mach64_overlay.cpp
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mach64_util.cpp
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mach64_util.cpp
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rage128_cursor.cpp
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rage128_cursor.cpp
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@@ -23,6 +25,7 @@ Addon ati.accelerant :
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rage128_draw.cpp
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rage128_draw.cpp
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rage128_init.cpp
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rage128_init.cpp
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rage128_mode.cpp
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rage128_mode.cpp
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rage128_overlay.cpp
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: be libaccelerantscommon.a
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: be libaccelerantscommon.a
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;
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;
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@@ -1,9 +1,9 @@
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/*
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/*
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Copyright 2007-2009 Haiku, Inc. All rights reserved.
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Copyright 2007-2011 Haiku, Inc. All rights reserved.
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Distributed under the terms of the MIT license.
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Distributed under the terms of the MIT license.
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Authors:
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Authors:
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Gerald Zajac 2007-2009
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Gerald Zajac
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*/
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*/
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#ifndef _ACCELERANT_H
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#ifndef _ACCELERANT_H
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@@ -52,22 +52,27 @@ struct AccelerantInfo {
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status_t (*SetDPMSMode)(uint32 dpms_flags);
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status_t (*SetDPMSMode)(uint32 dpms_flags);
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// Pointers to cursor functions.
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// Pointers to cursor functions.
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bool (*LoadCursorImage)(int width, int height, uint8* and_mask, uint8* xor_mask);
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bool (*LoadCursorImage)(int width, int height, uint8* and_mask,
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uint8* xor_mask);
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void (*SetCursorPosition)(int x, int y);
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void (*SetCursorPosition)(int x, int y);
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void (*ShowCursor)(bool bShow);
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void (*ShowCursor)(bool bShow);
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// Pointers to 2D acceleration functions.
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// Pointers to 2D acceleration functions.
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void (*FillRectangle)(engine_token*, uint32 color, fill_rect_params*, uint32 count);
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void (*FillRectangle)(engine_token*, uint32 color, fill_rect_params*,
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void (*FillSpan)(engine_token*, uint32 color, uint16* list, uint32 count);
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uint32 count);
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void (*FillSpan)(engine_token*, uint32 color, uint16* list,
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uint32 count);
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void (*InvertRectangle)(engine_token*, fill_rect_params*, uint32 count);
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void (*InvertRectangle)(engine_token*, fill_rect_params*, uint32 count);
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void (*ScreenToScreenBlit)(engine_token*, blit_params*, uint32 count);
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void (*ScreenToScreenBlit)(engine_token*, blit_params*, uint32 count);
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// Pointers to other functions.
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// Pointers to other functions.
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void (*AdjustFrame)(const DisplayModeEx& mode);
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void (*AdjustFrame)(const DisplayModeEx& mode);
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status_t (*ChipInit)(void);
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status_t (*ChipInit)(void);
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bool (*GetColorSpaceParams)(int colorSpace, uint8& bpp, uint32& maxPixelClk);
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bool (*GetColorSpaceParams)(int colorSpace, uint8& bpp,
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uint32& maxPixelClk);
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status_t (*SetDisplayMode)(const DisplayModeEx& mode);
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status_t (*SetDisplayMode)(const DisplayModeEx& mode);
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void (*SetIndexedColors)(uint count, uint8 first, uint8* color_data, uint32 flags);
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void (*SetIndexedColors)(uint count, uint8 first, uint8* color_data,
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uint32 flags);
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};
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};
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extern AccelerantInfo gInfo;
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extern AccelerantInfo gInfo;
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@@ -95,15 +100,18 @@ sem_id AccelerantRetraceSemaphore(void);
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// Mode Configuration
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// Mode Configuration
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uint32 AccelerantModeCount(void);
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uint32 AccelerantModeCount(void);
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status_t GetModeList(display_mode* dm);
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status_t GetModeList(display_mode* dm);
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status_t ProposeDisplayMode(display_mode* target, const display_mode* low, const display_mode* high);
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status_t ProposeDisplayMode(display_mode* target, const display_mode* low,
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const display_mode* high);
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status_t SetDisplayMode(display_mode* mode_to_set);
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status_t SetDisplayMode(display_mode* mode_to_set);
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status_t GetDisplayMode(display_mode* current_mode);
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status_t GetDisplayMode(display_mode* current_mode);
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status_t GetFrameBufferConfig(frame_buffer_config* a_frame_buffer);
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status_t GetFrameBufferConfig(frame_buffer_config* a_frame_buffer);
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status_t GetPixelClockLimits(display_mode* dm, uint32* low, uint32* high);
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status_t GetPixelClockLimits(display_mode* dm, uint32* low, uint32* high);
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status_t MoveDisplay(uint16 h_display_start, uint16 v_display_start);
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status_t MoveDisplay(uint16 h_display_start, uint16 v_display_start);
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status_t GetTimingConstraints(display_timing_constraints* dtc);
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status_t GetTimingConstraints(display_timing_constraints* dtc);
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void Mach64_SetIndexedColors(uint count, uint8 first, uint8* color_data, uint32 flags);
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void Mach64_SetIndexedColors(uint count, uint8 first, uint8* color_data,
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void Rage128_SetIndexedColors(uint count, uint8 first, uint8* color_data, uint32 flags);
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uint32 flags);
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void Rage128_SetIndexedColors(uint count, uint8 first, uint8* color_data,
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uint32 flags);
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status_t GetPreferredDisplayMode(display_mode* preferredMode);
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status_t GetPreferredDisplayMode(display_mode* preferredMode);
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status_t GetEdidInfo(void* info, size_t size, uint32* _version);
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status_t GetEdidInfo(void* info, size_t size, uint32* _version);
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@@ -118,27 +126,50 @@ status_t Rage128_SetDPMSMode(uint32 dpms_flags);
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// Cursor
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// Cursor
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status_t SetCursorShape(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y,
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status_t SetCursorShape(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y,
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uint8* andMask, uint8* xorMask);
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uint8* andMask, uint8* xorMask);
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void MoveCursor(uint16 x, uint16 y);
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void MoveCursor(uint16 x, uint16 y);
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// Engine Management
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// Engine Management
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uint32 AccelerantEngineCount(void);
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uint32 AccelerantEngineCount(void);
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status_t AcquireEngine(uint32 capabilities, uint32 max_wait, sync_token* st, engine_token** et);
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status_t AcquireEngine(uint32 capabilities, uint32 max_wait, sync_token* st,
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engine_token** et);
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status_t ReleaseEngine(engine_token* et, sync_token* st);
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status_t ReleaseEngine(engine_token* et, sync_token* st);
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void WaitEngineIdle(void);
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void WaitEngineIdle(void);
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status_t GetSyncToken(engine_token* et, sync_token* st);
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status_t GetSyncToken(engine_token* et, sync_token* st);
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status_t SyncToToken(sync_token* st);
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status_t SyncToToken(sync_token* st);
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// 2D acceleration
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// 2D acceleration
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void Mach64_FillRectangle(engine_token* et, uint32 color, fill_rect_params* list, uint32 count);
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void Mach64_FillRectangle(engine_token* et, uint32 color,
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void Mach64_FillSpan(engine_token* et, uint32 color, uint16* list, uint32 count);
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fill_rect_params* list, uint32 count);
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void Mach64_InvertRectangle(engine_token* et, fill_rect_params* list, uint32 count);
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void Mach64_FillSpan(engine_token* et, uint32 color, uint16* list,
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void Mach64_ScreenToScreenBlit(engine_token* et, blit_params* list, uint32 count);
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uint32 count);
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void Mach64_InvertRectangle(engine_token* et, fill_rect_params* list,
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uint32 count);
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void Mach64_ScreenToScreenBlit(engine_token* et, blit_params* list,
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uint32 count);
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void Rage128_FillRectangle(engine_token* et, uint32 color, fill_rect_params* list, uint32 count);
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void Rage128_FillRectangle(engine_token* et, uint32 color,
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void Rage128_FillSpan(engine_token* et, uint32 color, uint16* list, uint32 count);
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fill_rect_params* list, uint32 count);
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void Rage128_InvertRectangle(engine_token* et, fill_rect_params* list, uint32 count);
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void Rage128_FillSpan(engine_token* et, uint32 color, uint16* list,
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void Rage128_ScreenToScreenBlit(engine_token* et, blit_params* list, uint32 count);
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uint32 count);
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void Rage128_InvertRectangle(engine_token* et, fill_rect_params* list,
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uint32 count);
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void Rage128_ScreenToScreenBlit(engine_token* et, blit_params* list,
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uint32 count);
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// Video_overlay
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uint32 OverlayCount(const display_mode* dm);
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const uint32* OverlaySupportedSpaces(const display_mode* dm);
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uint32 OverlaySupportedFeatures(uint32 a_color_space);
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const overlay_buffer* AllocateOverlayBuffer(color_space cs, uint16 width,
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uint16 height);
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status_t ReleaseOverlayBuffer(const overlay_buffer* ob);
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status_t GetOverlayConstraints(const display_mode* dm,
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const overlay_buffer* ob, overlay_constraints* oc);
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overlay_token AllocateOverlay(void);
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status_t ReleaseOverlay(overlay_token ot);
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status_t ConfigureOverlay(overlay_token ot, const overlay_buffer* ob,
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const overlay_window* ow, const overlay_view* ov);
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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@@ -156,10 +187,15 @@ bool IsModeUsable(const display_mode* mode);
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// Mach64 functions.
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// Mach64 functions.
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bool Mach64_DisplayOverlay(const overlay_window* window,
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const overlay_buffer* buffer);
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void Mach64_StopOverlay(void);
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void Mach64_EngineReset(void);
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void Mach64_EngineReset(void);
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void Mach64_EngineInit(const DisplayModeEx& mode);
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void Mach64_EngineInit(const DisplayModeEx& mode);
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bool Mach64_LoadCursorImage(int width, int height, uint8* and_mask, uint8* xor_mask);
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bool Mach64_LoadCursorImage(int width, int height, uint8* and_mask,
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uint8* xor_mask);
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void Mach64_SetCursorPosition(int x, int y);
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void Mach64_SetCursorPosition(int x, int y);
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void Mach64_ShowCursor(bool bShow);
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void Mach64_ShowCursor(bool bShow);
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@@ -167,19 +203,25 @@ void Mach64_AdjustFrame(const DisplayModeEx& mode);
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status_t Mach64_SetDisplayMode(const DisplayModeEx& mode);
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status_t Mach64_SetDisplayMode(const DisplayModeEx& mode);
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void Mach64_SetFunctionPointers(void);
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void Mach64_SetFunctionPointers(void);
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int Mach64_Divide(int numerator, int denom, int shift, const int roundingKind);
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int Mach64_Divide(int numerator, int denom, int shift,
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void Mach64_ReduceRatio(int *numerator, int *denominator);
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const int roundingKind);
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void Mach64_ReduceRatio(int* numerator, int* denominator);
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// Rage128 functions.
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// Rage128 functions.
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bool Rage128_DisplayOverlay(const overlay_window* window,
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const overlay_buffer* buffer);
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void Rage128_StopOverlay(void);
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void Rage128_EngineFlush(void);
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void Rage128_EngineFlush(void);
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void Rage128_EngineReset(void);
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void Rage128_EngineReset(void);
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void Rage128_EngineInit(const DisplayModeEx& mode);
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void Rage128_EngineInit(const DisplayModeEx& mode);
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bool Rage128_GetEdidInfo(void);
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bool Rage128_GetEdidInfo(void);
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bool Rage128_LoadCursorImage(int width, int height, uint8* and_mask, uint8* xor_mask);
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bool Rage128_LoadCursorImage(int width, int height, uint8* and_mask,
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uint8* xor_mask);
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void Rage128_SetCursorPosition(int x, int y);
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void Rage128_SetCursorPosition(int x, int y);
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void Rage128_ShowCursor(bool bShow);
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void Rage128_ShowCursor(bool bShow);
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@@ -1,9 +1,9 @@
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/*
|
/*
|
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Copyright 2008 Haiku, Inc. All rights reserved.
|
Copyright 2008, 2011 Haiku, Inc. All rights reserved.
|
||||||
Distributed under the terms of the MIT license.
|
Distributed under the terms of the MIT license.
|
||||||
|
|
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Authors:
|
Authors:
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||||||
Gerald Zajac 2008
|
Gerald Zajac
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*/
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*/
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#include "accelerant.h"
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#include "accelerant.h"
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@@ -16,51 +16,106 @@ get_accelerant_hook(uint32 feature, void* data)
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switch (feature) {
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switch (feature) {
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// General
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// General
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case B_INIT_ACCELERANT: return (void*)InitAccelerant;
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case B_INIT_ACCELERANT:
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case B_UNINIT_ACCELERANT: return (void*)UninitAccelerant;
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return (void*)InitAccelerant;
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case B_CLONE_ACCELERANT: return (void*)CloneAccelerant;
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case B_UNINIT_ACCELERANT:
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case B_ACCELERANT_CLONE_INFO_SIZE: return (void*)AccelerantCloneInfoSize;
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return (void*)UninitAccelerant;
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case B_GET_ACCELERANT_CLONE_INFO: return (void*)GetAccelerantCloneInfo;
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case B_CLONE_ACCELERANT:
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case B_GET_ACCELERANT_DEVICE_INFO: return (void*)GetAccelerantDeviceInfo;
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return (void*)CloneAccelerant;
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case B_ACCELERANT_RETRACE_SEMAPHORE: return (void*)AccelerantRetraceSemaphore;
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case B_ACCELERANT_CLONE_INFO_SIZE:
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return (void*)AccelerantCloneInfoSize;
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case B_GET_ACCELERANT_CLONE_INFO:
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return (void*)GetAccelerantCloneInfo;
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case B_GET_ACCELERANT_DEVICE_INFO:
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return (void*)GetAccelerantDeviceInfo;
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case B_ACCELERANT_RETRACE_SEMAPHORE:
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return (void*)AccelerantRetraceSemaphore;
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// Mode Configuration
|
// Mode Configuration
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case B_ACCELERANT_MODE_COUNT: return (void*)AccelerantModeCount;
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case B_ACCELERANT_MODE_COUNT:
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case B_GET_MODE_LIST: return (void*)GetModeList;
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return (void*)AccelerantModeCount;
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||||||
case B_PROPOSE_DISPLAY_MODE: return (void*)ProposeDisplayMode;
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case B_GET_MODE_LIST:
|
||||||
case B_SET_DISPLAY_MODE: return (void*)SetDisplayMode;
|
return (void*)GetModeList;
|
||||||
case B_GET_DISPLAY_MODE: return (void*)GetDisplayMode;
|
case B_PROPOSE_DISPLAY_MODE:
|
||||||
case B_GET_PREFERRED_DISPLAY_MODE: return (void*)GetPreferredDisplayMode;
|
return (void*)ProposeDisplayMode;
|
||||||
case B_GET_EDID_INFO: return (void*)GetEdidInfo;
|
case B_SET_DISPLAY_MODE:
|
||||||
case B_GET_FRAME_BUFFER_CONFIG: return (void*)GetFrameBufferConfig;
|
return (void*)SetDisplayMode;
|
||||||
case B_GET_PIXEL_CLOCK_LIMITS: return (void*)GetPixelClockLimits;
|
case B_GET_DISPLAY_MODE:
|
||||||
case B_MOVE_DISPLAY: return (void*)MoveDisplay;
|
return (void*)GetDisplayMode;
|
||||||
case B_SET_INDEXED_COLORS: return (void*)(gInfo.SetIndexedColors);
|
case B_GET_PREFERRED_DISPLAY_MODE:
|
||||||
case B_GET_TIMING_CONSTRAINTS: return (void*)GetTimingConstraints;
|
return (void*)GetPreferredDisplayMode;
|
||||||
|
case B_GET_EDID_INFO:
|
||||||
|
return (void*)GetEdidInfo;
|
||||||
|
case B_GET_FRAME_BUFFER_CONFIG:
|
||||||
|
return (void*)GetFrameBufferConfig;
|
||||||
|
case B_GET_PIXEL_CLOCK_LIMITS:
|
||||||
|
return (void*)GetPixelClockLimits;
|
||||||
|
case B_MOVE_DISPLAY:
|
||||||
|
return (void*)MoveDisplay;
|
||||||
|
case B_SET_INDEXED_COLORS:
|
||||||
|
return (void*)(gInfo.SetIndexedColors);
|
||||||
|
case B_GET_TIMING_CONSTRAINTS:
|
||||||
|
return (void*)GetTimingConstraints;
|
||||||
|
|
||||||
// DPMS
|
// DPMS
|
||||||
case B_DPMS_CAPABILITIES: return (void*)(gInfo.DPMSCapabilities);
|
case B_DPMS_CAPABILITIES:
|
||||||
case B_DPMS_MODE: return (void*)(gInfo.GetDPMSMode);
|
return (void*)(gInfo.DPMSCapabilities);
|
||||||
case B_SET_DPMS_MODE: return (void*)(gInfo.SetDPMSMode);
|
case B_DPMS_MODE:
|
||||||
|
return (void*)(gInfo.GetDPMSMode);
|
||||||
|
case B_SET_DPMS_MODE:
|
||||||
|
return (void*)(gInfo.SetDPMSMode);
|
||||||
|
|
||||||
// Cursor
|
// Cursor
|
||||||
case B_SET_CURSOR_SHAPE: return (void*)SetCursorShape;
|
case B_SET_CURSOR_SHAPE:
|
||||||
case B_MOVE_CURSOR: return (void*)MoveCursor;
|
return (void*)SetCursorShape;
|
||||||
case B_SHOW_CURSOR: return (void*)(gInfo.ShowCursor);
|
case B_MOVE_CURSOR:
|
||||||
|
return (void*)MoveCursor;
|
||||||
|
case B_SHOW_CURSOR:
|
||||||
|
return (void*)(gInfo.ShowCursor);
|
||||||
|
|
||||||
// Engine Management
|
// Engine Management
|
||||||
case B_ACCELERANT_ENGINE_COUNT: return (void*)AccelerantEngineCount;
|
case B_ACCELERANT_ENGINE_COUNT:
|
||||||
case B_ACQUIRE_ENGINE: return (void*)AcquireEngine;
|
return (void*)AccelerantEngineCount;
|
||||||
case B_RELEASE_ENGINE: return (void*)ReleaseEngine;
|
case B_ACQUIRE_ENGINE:
|
||||||
case B_WAIT_ENGINE_IDLE: return (void*)WaitEngineIdle;
|
return (void*)AcquireEngine;
|
||||||
case B_GET_SYNC_TOKEN: return (void*)GetSyncToken;
|
case B_RELEASE_ENGINE:
|
||||||
case B_SYNC_TO_TOKEN: return (void*)SyncToToken;
|
return (void*)ReleaseEngine;
|
||||||
|
case B_WAIT_ENGINE_IDLE:
|
||||||
|
return (void*)WaitEngineIdle;
|
||||||
|
case B_GET_SYNC_TOKEN:
|
||||||
|
return (void*)GetSyncToken;
|
||||||
|
case B_SYNC_TO_TOKEN:
|
||||||
|
return (void*)SyncToToken;
|
||||||
|
|
||||||
// 2D acceleration
|
// 2D acceleration
|
||||||
case B_SCREEN_TO_SCREEN_BLIT: return (void*)(gInfo.ScreenToScreenBlit);
|
case B_SCREEN_TO_SCREEN_BLIT:
|
||||||
case B_FILL_RECTANGLE: return (void*)(gInfo.FillRectangle);
|
return (void*)(gInfo.ScreenToScreenBlit);
|
||||||
case B_INVERT_RECTANGLE: return (void*)(gInfo.InvertRectangle);
|
case B_FILL_RECTANGLE:
|
||||||
case B_FILL_SPAN: return (void*)(gInfo.FillSpan);
|
return (void*)(gInfo.FillRectangle);
|
||||||
|
case B_INVERT_RECTANGLE:
|
||||||
|
return (void*)(gInfo.InvertRectangle);
|
||||||
|
case B_FILL_SPAN:
|
||||||
|
return (void*)(gInfo.FillSpan);
|
||||||
|
|
||||||
|
// Overlay
|
||||||
|
case B_OVERLAY_COUNT:
|
||||||
|
return (void*)OverlayCount;
|
||||||
|
case B_OVERLAY_SUPPORTED_SPACES:
|
||||||
|
return (void*)OverlaySupportedSpaces;
|
||||||
|
case B_OVERLAY_SUPPORTED_FEATURES:
|
||||||
|
return (void*)OverlaySupportedFeatures;
|
||||||
|
case B_ALLOCATE_OVERLAY_BUFFER:
|
||||||
|
return (void*)AllocateOverlayBuffer;
|
||||||
|
case B_RELEASE_OVERLAY_BUFFER:
|
||||||
|
return (void*)ReleaseOverlayBuffer;
|
||||||
|
case B_GET_OVERLAY_CONSTRAINTS:
|
||||||
|
return (void*)GetOverlayConstraints;
|
||||||
|
case B_ALLOCATE_OVERLAY:
|
||||||
|
return (void*)AllocateOverlay;
|
||||||
|
case B_RELEASE_OVERLAY:
|
||||||
|
return (void*)ReleaseOverlay;
|
||||||
|
case B_CONFIGURE_OVERLAY:
|
||||||
|
return (void*)ConfigureOverlay;
|
||||||
}
|
}
|
||||||
|
|
||||||
return NULL; // Return null pointer for any feature not handled above
|
return NULL; // Return null pointer for any feature not handled above
|
||||||
|
|||||||
@@ -1,13 +1,14 @@
|
|||||||
/*
|
/*
|
||||||
Haiku ATI video driver adapted from the X.org ATI driver.
|
Haiku ATI video driver adapted from the X.org ATI driver which has the
|
||||||
|
following copyright:
|
||||||
|
|
||||||
Copyright 1992,1993,1994,1995,1996,1997 by Kevin E. Martin, Chapel Hill, North Carolina.
|
Copyright 1992,1993,1994,1995,1996,1997 by Kevin E. Martin, Chapel Hill, North Carolina.
|
||||||
|
|
||||||
Copyright 2009 Haiku, Inc. All rights reserved.
|
Copyright 2009, 2011 Haiku, Inc. All rights reserved.
|
||||||
Distributed under the terms of the MIT license.
|
Distributed under the terms of the MIT license.
|
||||||
|
|
||||||
Authors:
|
Authors:
|
||||||
Gerald Zajac 2009
|
Gerald Zajac
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MACH64_H__
|
#ifndef __MACH64_H__
|
||||||
@@ -178,6 +179,39 @@ enum Mach64_MemoryType
|
|||||||
#define GUI_STAT (0x0c00 + 0x0338) // Dword offset CE
|
#define GUI_STAT (0x0c00 + 0x0338) // Dword offset CE
|
||||||
|
|
||||||
|
|
||||||
|
// Definitions used for overlays.
|
||||||
|
//===============================
|
||||||
|
|
||||||
|
#define REG_BLOCK_1 0x0800 // offset of register block 1 in register area
|
||||||
|
|
||||||
|
#define OVERLAY_Y_X_START (REG_BLOCK_1 + 0x0000) // Dword offset 00
|
||||||
|
#define OVERLAY_LOCK_START 0x80000000ul
|
||||||
|
#define OVERLAY_Y_X_END (REG_BLOCK_1 + 0x0004) // Dword offset 01
|
||||||
|
#define OVERLAY_GRAPHICS_KEY_CLR (REG_BLOCK_1 + 0x0010) // Dword offset 04
|
||||||
|
#define OVERLAY_GRAPHICS_KEY_MSK (REG_BLOCK_1 + 0x0014) // Dword offset 05
|
||||||
|
#define OVERLAY_KEY_CNTL (REG_BLOCK_1 + 0x0018) // Dword offset 06
|
||||||
|
#define OVERLAY_MIX_FALSE 0x00
|
||||||
|
#define OVERLAY_MIX_EQUAL 0x50
|
||||||
|
#define OVERLAY_SCALE_INC (REG_BLOCK_1 + 0x0020) // Dword offset 08
|
||||||
|
#define OVERLAY_SCALE_CNTL (REG_BLOCK_1 + 0x0024) // Dword offset 09
|
||||||
|
#define SCALE_PIX_EXPAND 0x00000001
|
||||||
|
#define OVERLAY_EN 0x40000000
|
||||||
|
#define SCALE_EN 0x80000000
|
||||||
|
#define SCALER_HEIGHT_WIDTH (REG_BLOCK_1 + 0x0028) // Dword offset 0a
|
||||||
|
#define SCALER_BUF0_OFFSET (REG_BLOCK_1 + 0x0034) // Dword offset 0d
|
||||||
|
#define SCALER_BUF0_PITCH (REG_BLOCK_1 + 0x003c) // Dword offset 0f
|
||||||
|
#define VIDEO_FORMAT (REG_BLOCK_1 + 0x0048) // Dword offset 12
|
||||||
|
#define SCALE_IN_VYUY422 0x000b0000
|
||||||
|
#define BUF0_OFFSET (REG_BLOCK_1 + 0x0080) // Dword offset 20
|
||||||
|
#define BUF0_PITCH (REG_BLOCK_1 + 0x008c) // Dword offset 23
|
||||||
|
#define SCALER_COLOUR_CNTL (REG_BLOCK_1 + 0x0150) // Dword offset 54
|
||||||
|
#define SCALER_H_COEFF0 (REG_BLOCK_1 + 0x0154) // Dword offset 55
|
||||||
|
#define SCALER_H_COEFF1 (REG_BLOCK_1 + 0x0158) // Dword offset 56
|
||||||
|
#define SCALER_H_COEFF2 (REG_BLOCK_1 + 0x015c) // Dword offset 57
|
||||||
|
#define SCALER_H_COEFF3 (REG_BLOCK_1 + 0x0160) // Dword offset 58
|
||||||
|
#define SCALER_H_COEFF4 (REG_BLOCK_1 + 0x0164) // Dword offset 59
|
||||||
|
|
||||||
|
|
||||||
// CRTC control values.
|
// CRTC control values.
|
||||||
|
|
||||||
#define CRTC_H_SYNC_NEG 0x00200000
|
#define CRTC_H_SYNC_NEG 0x00200000
|
||||||
@@ -225,11 +259,10 @@ enum Mach64_MemoryType
|
|||||||
#define CRTC_PITCH 0xffc00000
|
#define CRTC_PITCH 0xffc00000
|
||||||
|
|
||||||
// DAC control values.
|
// DAC control values.
|
||||||
|
|
||||||
#define DAC_8BIT_EN 0x00000100
|
#define DAC_8BIT_EN 0x00000100
|
||||||
|
|
||||||
// Mix control values.
|
|
||||||
|
|
||||||
|
// Mix control values.
|
||||||
#define MIX_NOT_DST 0x0000
|
#define MIX_NOT_DST 0x0000
|
||||||
#define MIX_0 0x0001
|
#define MIX_0 0x0001
|
||||||
#define MIX_1 0x0002
|
#define MIX_1 0x0002
|
||||||
@@ -250,7 +283,7 @@ enum Mach64_MemoryType
|
|||||||
// BUS_CNTL register constants.
|
// BUS_CNTL register constants.
|
||||||
#define BUS_FIFO_ERR_ACK 0x00200000
|
#define BUS_FIFO_ERR_ACK 0x00200000
|
||||||
#define BUS_HOST_ERR_ACK 0x00800000
|
#define BUS_HOST_ERR_ACK 0x00800000
|
||||||
#define BUS_APER_REG_DIS 0x00000010
|
#define BUS_EXT_REG_EN 0x08000000
|
||||||
|
|
||||||
// GEN_TEST_CNTL register constants.
|
// GEN_TEST_CNTL register constants.
|
||||||
#define GEN_OVR_OUTPUT_EN 0x20
|
#define GEN_OVR_OUTPUT_EN 0x20
|
||||||
@@ -361,13 +394,13 @@ enum Mach64_MemoryType
|
|||||||
#define BYTE_ORDER_LSB_TO_MSB 0x1000000
|
#define BYTE_ORDER_LSB_TO_MSB 0x1000000
|
||||||
|
|
||||||
// DP_SRC register constants.
|
// DP_SRC register constants.
|
||||||
#define BKGD_SRC_BKGD_CLR 0
|
#define BKGD_SRC_BKGD_CLR 0
|
||||||
#define FRGD_SRC_FRGD_CLR 0x100
|
#define FRGD_SRC_FRGD_CLR 0x100
|
||||||
#define FRGD_SRC_BLIT 0x300
|
#define FRGD_SRC_BLIT 0x300
|
||||||
#define MONO_SRC_ONE 0
|
#define MONO_SRC_ONE 0
|
||||||
|
|
||||||
// GUI_STAT register constants.
|
// GUI_STAT register constants.
|
||||||
#define ENGINE_BUSY 1
|
#define ENGINE_BUSY 1
|
||||||
|
|
||||||
// LCD Index register constants.
|
// LCD Index register constants.
|
||||||
#define LCD_REG_INDEX 0x0000003F
|
#define LCD_REG_INDEX 0x0000003F
|
||||||
|
|||||||
@@ -1,15 +1,16 @@
|
|||||||
/*
|
/*
|
||||||
Haiku ATI video driver adapted from the X.org ATI driver.
|
Haiku ATI video driver adapted from the X.org ATI driver which has the
|
||||||
|
following copyright:
|
||||||
|
|
||||||
Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
|
Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
|
||||||
Precision Insight, Inc., Cedar Park, Texas, and
|
Precision Insight, Inc., Cedar Park, Texas, and
|
||||||
VA Linux Systems Inc., Fremont, California.
|
VA Linux Systems Inc., Fremont, California.
|
||||||
|
|
||||||
Copyright 2009 Haiku, Inc. All rights reserved.
|
Copyright 2009, 2011 Haiku, Inc. All rights reserved.
|
||||||
Distributed under the terms of the MIT license.
|
Distributed under the terms of the MIT license.
|
||||||
|
|
||||||
Authors:
|
Authors:
|
||||||
Gerald Zajac 2009
|
Gerald Zajac
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
@@ -17,7 +18,7 @@
|
|||||||
#define __RAGE128_H__
|
#define __RAGE128_H__
|
||||||
|
|
||||||
|
|
||||||
#define CURSOR_BYTES 1024 // bytes used for cursor image in video memory
|
#define CURSOR_BYTES 1024 // bytes used for cursor image in video memory
|
||||||
|
|
||||||
#define R128_TIMEOUT 2000000 // Fall out of wait loops after this count
|
#define R128_TIMEOUT 2000000 // Fall out of wait loops after this count
|
||||||
|
|
||||||
@@ -203,7 +204,6 @@
|
|||||||
#define R128_OVR_CLR 0x0230
|
#define R128_OVR_CLR 0x0230
|
||||||
#define R128_OVR_WID_LEFT_RIGHT 0x0234
|
#define R128_OVR_WID_LEFT_RIGHT 0x0234
|
||||||
#define R128_OVR_WID_TOP_BOTTOM 0x0238
|
#define R128_OVR_WID_TOP_BOTTOM 0x0238
|
||||||
#define R128_OV0_SCALE_CNTL 0x0420
|
|
||||||
|
|
||||||
#define R128_PALETTE_DATA 0x00b4
|
#define R128_PALETTE_DATA 0x00b4
|
||||||
#define R128_PALETTE_INDEX 0x00b0
|
#define R128_PALETTE_INDEX 0x00b0
|
||||||
@@ -231,13 +231,46 @@
|
|||||||
|
|
||||||
#define R128_TMDS_CRC 0x02a0
|
#define R128_TMDS_CRC 0x02a0
|
||||||
|
|
||||||
#define R128_VCLK_ECP_CNTL 0x0008 // PLL
|
#define R128_VCLK_ECP_CNTL 0x0008 // PLL
|
||||||
# define R128_VCLK_SRC_SEL_MASK 0x03
|
# define R128_VCLK_SRC_SEL_MASK 0x03
|
||||||
# define R128_VCLK_SRC_SEL_CPUCLK 0x00
|
# define R128_VCLK_SRC_SEL_CPUCLK 0x00
|
||||||
# define R128_VCLK_SRC_SEL_PPLLCLK 0x03
|
# define R128_VCLK_SRC_SEL_PPLLCLK 0x03
|
||||||
|
# define R128_ECP_DIV_MASK (3 << 8)
|
||||||
#define R128_VIPH_CONTROL 0x01D0 // ?
|
#define R128_VIPH_CONTROL 0x01D0 // ?
|
||||||
|
|
||||||
|
|
||||||
|
// Definitions used for overlays.
|
||||||
|
//===============================
|
||||||
|
|
||||||
|
#define R128_OV0_Y_X_START 0x0400
|
||||||
|
#define R128_OV0_Y_X_END 0x0404
|
||||||
|
#define R128_OV0_EXCLUSIVE_HORZ 0x0408
|
||||||
|
#define R128_OV0_REG_LOAD_CNTL 0x0410
|
||||||
|
#define R128_OV0_SCALE_CNTL 0x0420
|
||||||
|
#define R128_OV0_V_INC 0x0424
|
||||||
|
#define R128_OV0_P1_V_ACCUM_INIT 0x0428
|
||||||
|
#define R128_OV0_P23_V_ACCUM_INIT 0x042C
|
||||||
|
#define R128_OV0_P1_BLANK_LINES_AT_TOP 0x0430
|
||||||
|
#define R128_OV0_VID_BUF0_BASE_ADRS 0x0440
|
||||||
|
#define R128_OV0_VID_BUF_PITCH0_VALUE 0x0460
|
||||||
|
#define R128_OV0_AUTO_FLIP_CNTL 0x0470
|
||||||
|
#define R128_OV0_H_INC 0x0480
|
||||||
|
#define R128_OV0_STEP_BY 0x0484
|
||||||
|
#define R128_OV0_P1_H_ACCUM_INIT 0x0488
|
||||||
|
#define R128_OV0_P23_H_ACCUM_INIT 0x048C
|
||||||
|
#define R128_OV0_P1_X_START_END 0x0494
|
||||||
|
#define R128_OV0_P2_X_START_END 0x0498
|
||||||
|
#define R128_OV0_P3_X_START_END 0x049C
|
||||||
|
#define R128_OV0_FILTER_CNTL 0x04A0
|
||||||
|
#define R128_OV0_COLOUR_CNTL 0x04E0
|
||||||
|
#define R128_OV0_GRAPHICS_KEY_CLR 0x04EC
|
||||||
|
#define R128_OV0_GRAPHICS_KEY_MSK 0x04F0
|
||||||
|
#define R128_OV0_KEY_CNTL 0x04F4
|
||||||
|
# define R128_GRAPHIC_KEY_FN_EQ 0x00000040L
|
||||||
|
# define R128_GRAPHIC_KEY_FN_NE 0x00000050L
|
||||||
|
#define R128_OV0_TEST 0x04F8
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
// Functions to get/set PLL registers.
|
// Functions to get/set PLL registers.
|
||||||
//=======================================
|
//=======================================
|
||||||
|
|||||||
@@ -1,9 +1,9 @@
|
|||||||
/*
|
/*
|
||||||
Copyright 2007-2009 Haiku, Inc. All rights reserved.
|
Copyright 2007-2011 Haiku, Inc. All rights reserved.
|
||||||
Distributed under the terms of the MIT license.
|
Distributed under the terms of the MIT license.
|
||||||
|
|
||||||
Authors:
|
Authors:
|
||||||
Gerald Zajac 2007-2009
|
Gerald Zajac
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <KernelExport.h>
|
#include <KernelExport.h>
|
||||||
@@ -20,7 +20,6 @@
|
|||||||
|
|
||||||
#undef TRACE
|
#undef TRACE
|
||||||
|
|
||||||
//#define ENABLE_DEBUG_TRACE
|
|
||||||
#ifdef ENABLE_DEBUG_TRACE
|
#ifdef ENABLE_DEBUG_TRACE
|
||||||
# define TRACE(x...) dprintf("ati: " x)
|
# define TRACE(x...) dprintf("ati: " x)
|
||||||
#else
|
#else
|
||||||
@@ -41,7 +40,7 @@
|
|||||||
#define M64_BIOS_SIZE 0x10000 // 64KB
|
#define M64_BIOS_SIZE 0x10000 // 64KB
|
||||||
#define R128_BIOS_SIZE 0x10000 // 64KB
|
#define R128_BIOS_SIZE 0x10000 // 64KB
|
||||||
|
|
||||||
int32 api_version = B_CUR_DRIVER_API_VERSION; // revision of driver API we support
|
int32 api_version = B_CUR_DRIVER_API_VERSION; // revision of driver API used
|
||||||
|
|
||||||
#define VENDOR_ID 0x1002 // ATI vendor ID
|
#define VENDOR_ID 0x1002 // ATI vendor ID
|
||||||
|
|
||||||
@@ -54,7 +53,8 @@ int32 api_version = B_CUR_DRIVER_API_VERSION; // revision of driver API we suppo
|
|||||||
struct ChipInfo {
|
struct ChipInfo {
|
||||||
uint16 chipID; // PCI device id of the chip
|
uint16 chipID; // PCI device id of the chip
|
||||||
ChipType chipType; // assigned chip type identifier
|
ChipType chipType; // assigned chip type identifier
|
||||||
const char* chipName; // user recognizable name for chip (must be < 32 chars)
|
const char* chipName; // user recognizable name for chip
|
||||||
|
// (must be < 32 chars)
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@@ -199,14 +199,16 @@ static device_hooks gDeviceHooks =
|
|||||||
static inline uint32
|
static inline uint32
|
||||||
GetPCI(pci_info& info, uint8 offset, uint8 size)
|
GetPCI(pci_info& info, uint8 offset, uint8 size)
|
||||||
{
|
{
|
||||||
return gPCI->read_pci_config(info.bus, info.device, info.function, offset, size);
|
return gPCI->read_pci_config(info.bus, info.device, info.function, offset,
|
||||||
|
size);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
SetPCI(pci_info& info, uint8 offset, uint8 size, uint32 value)
|
SetPCI(pci_info& info, uint8 offset, uint8 size, uint32 value)
|
||||||
{
|
{
|
||||||
gPCI->write_pci_config(info.bus, info.device, info.function, offset, size, value);
|
gPCI->write_pci_config(info.bus, info.device, info.function, offset, size,
|
||||||
|
value);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -251,7 +253,8 @@ GetEdidFromBIOS(edid1_raw& edidRaw)
|
|||||||
|
|
||||||
status_t status = vm86_prepare(&vmState, 0x2000);
|
status_t status = vm86_prepare(&vmState, 0x2000);
|
||||||
if (status != B_OK) {
|
if (status != B_OK) {
|
||||||
TRACE("GetEdidFromBIOS(); vm86_prepare() failed, status: 0x%lx\n", status);
|
TRACE("GetEdidFromBIOS(); vm86_prepare() failed, status: 0x%lx\n",
|
||||||
|
status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -337,7 +340,8 @@ SetVesaDisplayMode(uint16 mode)
|
|||||||
|
|
||||||
status_t status = vm86_prepare(&vmState, 0x2000);
|
status_t status = vm86_prepare(&vmState, 0x2000);
|
||||||
if (status != B_OK) {
|
if (status != B_OK) {
|
||||||
TRACE("SetVesaDisplayMode(); vm86_prepare() failed, status: 0x%lx\n", status);
|
TRACE("SetVesaDisplayMode(); vm86_prepare() failed, status: 0x%lx\n",
|
||||||
|
status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -505,8 +509,9 @@ Rage128_GetBiosParameters(DeviceInfo& di)
|
|||||||
pll.max_pll_freq = BIOS32(pllInfoBlock + 0x16);
|
pll.max_pll_freq = BIOS32(pllInfoBlock + 0x16);
|
||||||
pll.xclk = BIOS16(pllInfoBlock + 0x08);
|
pll.xclk = BIOS16(pllInfoBlock + 0x08);
|
||||||
|
|
||||||
TRACE("PLL parameters: rf=%d rd=%d min=%ld max=%ld; xclk=%d\n", pll.reference_freq,
|
TRACE("PLL parameters: rf=%d rd=%d min=%ld max=%ld; xclk=%d\n",
|
||||||
pll.reference_div, pll.min_pll_freq, pll.max_pll_freq, pll.xclk);
|
pll.reference_freq, pll.reference_div, pll.min_pll_freq,
|
||||||
|
pll.max_pll_freq, pll.xclk);
|
||||||
|
|
||||||
// If Mobility chip, get the LCD panel width & height and a few other
|
// If Mobility chip, get the LCD panel width & height and a few other
|
||||||
// related parameters.
|
// related parameters.
|
||||||
@@ -537,7 +542,8 @@ Rage128_GetBiosParameters(DeviceInfo& di)
|
|||||||
si.panelY = BIOS16(fpStart + 27);
|
si.panelY = BIOS16(fpStart + 27);
|
||||||
si.panelPowerDelay = BIOS8(fpStart + 56);
|
si.panelPowerDelay = BIOS8(fpStart + 56);
|
||||||
TRACE("LCD Panel size: %dx%d Panel type: 0x%x power delay: %d\n",
|
TRACE("LCD Panel size: %dx%d Panel type: 0x%x power delay: %d\n",
|
||||||
si.panelX, si.panelY, BIOS16(fpStart + 29), si.panelPowerDelay);
|
si.panelX, si.panelY, BIOS16(fpStart + 29),
|
||||||
|
si.panelPowerDelay);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -566,9 +572,9 @@ MapDevice(DeviceInfo& di)
|
|||||||
|
|
||||||
// Map the video memory.
|
// Map the video memory.
|
||||||
|
|
||||||
uint32 videoRamAddr = pciInfo.u.h0.base_registers[0];
|
phys_addr_t videoRamAddr = pciInfo.u.h0.base_registers[0];
|
||||||
uint32 videoRamSize = pciInfo.u.h0.base_register_sizes[0];
|
uint32 videoRamSize = pciInfo.u.h0.base_register_sizes[0];
|
||||||
si.videoMemPCI = (void *)videoRamAddr;
|
si.videoMemPCI = videoRamAddr;
|
||||||
char frameBufferAreaName[] = "ATI frame buffer";
|
char frameBufferAreaName[] = "ATI frame buffer";
|
||||||
|
|
||||||
si.videoMemArea = map_physical_memory(
|
si.videoMemArea = map_physical_memory(
|
||||||
@@ -577,7 +583,7 @@ MapDevice(DeviceInfo& di)
|
|||||||
videoRamSize,
|
videoRamSize,
|
||||||
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
|
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
|
||||||
B_READ_AREA + B_WRITE_AREA,
|
B_READ_AREA + B_WRITE_AREA,
|
||||||
&(si.videoMemAddr));
|
(void**)&(si.videoMemAddr));
|
||||||
|
|
||||||
if (si.videoMemArea < 0) {
|
if (si.videoMemArea < 0) {
|
||||||
// Try to map this time without write combining.
|
// Try to map this time without write combining.
|
||||||
@@ -587,7 +593,7 @@ MapDevice(DeviceInfo& di)
|
|||||||
videoRamSize,
|
videoRamSize,
|
||||||
B_ANY_KERNEL_BLOCK_ADDRESS,
|
B_ANY_KERNEL_BLOCK_ADDRESS,
|
||||||
B_READ_AREA + B_WRITE_AREA,
|
B_READ_AREA + B_WRITE_AREA,
|
||||||
&(si.videoMemAddr));
|
(void**)&(si.videoMemAddr));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (si.videoMemArea < 0)
|
if (si.videoMemArea < 0)
|
||||||
@@ -595,7 +601,7 @@ MapDevice(DeviceInfo& di)
|
|||||||
|
|
||||||
// Map the MMIO register area.
|
// Map the MMIO register area.
|
||||||
|
|
||||||
uint32 regsBase = pciInfo.u.h0.base_registers[2];
|
phys_addr_t regsBase = pciInfo.u.h0.base_registers[2];
|
||||||
uint32 regAreaSize = pciInfo.u.h0.base_register_sizes[2];
|
uint32 regAreaSize = pciInfo.u.h0.base_register_sizes[2];
|
||||||
|
|
||||||
// If the register area address or size is not in the PCI info, it should
|
// If the register area address or size is not in the PCI info, it should
|
||||||
@@ -619,7 +625,8 @@ MapDevice(DeviceInfo& di)
|
|||||||
|
|
||||||
regsBase = videoRamAddr + regsOffset;
|
regsBase = videoRamAddr + regsOffset;
|
||||||
regAreaSize = 0x1000;
|
regAreaSize = 0x1000;
|
||||||
TRACE("Register address is at end of frame buffer memory at 0x%lx\n", regsBase);
|
TRACE("Register address is at end of frame buffer memory at 0x%lx\n",
|
||||||
|
uint32(regsBase));
|
||||||
}
|
}
|
||||||
|
|
||||||
si.regsArea = map_physical_memory("ATI mmio registers",
|
si.regsArea = map_physical_memory("ATI mmio registers",
|
||||||
@@ -627,7 +634,7 @@ MapDevice(DeviceInfo& di)
|
|||||||
regAreaSize,
|
regAreaSize,
|
||||||
B_ANY_KERNEL_ADDRESS,
|
B_ANY_KERNEL_ADDRESS,
|
||||||
0, // neither read nor write, to hide it from user space apps
|
0, // neither read nor write, to hide it from user space apps
|
||||||
(void**)(&(di.regs)));
|
(void**)&di.regs);
|
||||||
|
|
||||||
// If there was an error, delete other areas.
|
// If there was an error, delete other areas.
|
||||||
if (si.regsArea < 0) {
|
if (si.regsArea < 0) {
|
||||||
@@ -650,7 +657,7 @@ UnmapDevice(DeviceInfo& di)
|
|||||||
delete_area(si.videoMemArea);
|
delete_area(si.videoMemArea);
|
||||||
|
|
||||||
si.regsArea = si.videoMemArea = -1;
|
si.regsArea = si.videoMemArea = -1;
|
||||||
si.videoMemAddr = NULL;
|
si.videoMemAddr = (addr_t)NULL;
|
||||||
di.regs = NULL;
|
di.regs = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -768,7 +775,8 @@ InitDevice(DeviceInfo& di)
|
|||||||
si.vesaModeTableOffset = sharedSize;
|
si.vesaModeTableOffset = sharedSize;
|
||||||
si.vesaModeCount = vesaModeTableSize / sizeof(VesaMode);
|
si.vesaModeCount = vesaModeTableSize / sizeof(VesaMode);
|
||||||
|
|
||||||
memcpy((uint8*)&si + si.vesaModeTableOffset, vesaModes, vesaModeTableSize);
|
memcpy((uint8*)&si + si.vesaModeTableOffset, vesaModes,
|
||||||
|
vesaModeTableSize);
|
||||||
}
|
}
|
||||||
|
|
||||||
pci_info& pciInfo = di.pciInfo;
|
pci_info& pciInfo = di.pciInfo;
|
||||||
@@ -892,7 +900,8 @@ init_hardware(void)
|
|||||||
pci_info pciInfo;
|
pci_info pciInfo;
|
||||||
const ChipInfo* pDevice = GetNextSupportedDevice(pciIndex, pciInfo);
|
const ChipInfo* pDevice = GetNextSupportedDevice(pciIndex, pciInfo);
|
||||||
|
|
||||||
TRACE("init_hardware() - %s\n", pDevice == NULL ? "no supported devices" : "device supported");
|
TRACE("init_hardware() - %s\n",
|
||||||
|
pDevice == NULL ? "no supported devices" : "device supported");
|
||||||
|
|
||||||
put_module(B_PCI_MODULE_NAME); // put away the module manager
|
put_module(B_PCI_MODULE_NAME); // put away the module manager
|
||||||
|
|
||||||
@@ -900,7 +909,8 @@ init_hardware(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
status_t init_driver(void)
|
status_t
|
||||||
|
init_driver(void)
|
||||||
{
|
{
|
||||||
// Get handle for the pci bus.
|
// Get handle for the pci bus.
|
||||||
|
|
||||||
@@ -1011,7 +1021,8 @@ device_open(const char* name, uint32 /*flags*/, void** cookie)
|
|||||||
*cookie = &di; // send cookie to opener
|
*cookie = &di; // send cookie to opener
|
||||||
}
|
}
|
||||||
|
|
||||||
TRACE("device_open() returning 0x%lx, open count: %ld\n", status, di.openCount);
|
TRACE("device_open() returning 0x%lx, open count: %ld\n", status,
|
||||||
|
di.openCount);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1019,7 +1030,8 @@ device_open(const char* name, uint32 /*flags*/, void** cookie)
|
|||||||
static status_t
|
static status_t
|
||||||
device_read(void* dev, off_t pos, void* buf, size_t* len)
|
device_read(void* dev, off_t pos, void* buf, size_t* len)
|
||||||
{
|
{
|
||||||
// Following 3 lines of code are here to eliminate "unused parameter" warnings.
|
// Following 3 lines of code are here to eliminate "unused parameter"
|
||||||
|
// warnings.
|
||||||
(void)dev;
|
(void)dev;
|
||||||
(void)pos;
|
(void)pos;
|
||||||
(void)buf;
|
(void)buf;
|
||||||
@@ -1032,7 +1044,8 @@ device_read(void* dev, off_t pos, void* buf, size_t* len)
|
|||||||
static status_t
|
static status_t
|
||||||
device_write(void* dev, off_t pos, const void* buf, size_t* len)
|
device_write(void* dev, off_t pos, const void* buf, size_t* len)
|
||||||
{
|
{
|
||||||
// Following 3 lines of code are here to eliminate "unused parameter" warnings.
|
// Following 3 lines of code are here to eliminate "unused parameter"
|
||||||
|
// warnings.
|
||||||
(void)dev;
|
(void)dev;
|
||||||
(void)pos;
|
(void)pos;
|
||||||
(void)buf;
|
(void)buf;
|
||||||
@@ -1068,10 +1081,12 @@ device_free(void* dev)
|
|||||||
DisableVBI(); // disable & clear any pending interrupts
|
DisableVBI(); // disable & clear any pending interrupts
|
||||||
|
|
||||||
if (si.bInterruptAssigned) {
|
if (si.bInterruptAssigned) {
|
||||||
remove_io_interrupt_handler(pciInfo.u.h0.interrupt_line, InterruptHandler, &di);
|
remove_io_interrupt_handler(pciInfo.u.h0.interrupt_line,
|
||||||
|
InterruptHandler, &di);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Delete the semaphores, ignoring any errors because the owning team may have died.
|
// Delete the semaphores, ignoring any errors because the owning team
|
||||||
|
// may have died.
|
||||||
if (si.vertBlankSem >= 0)
|
if (si.vertBlankSem >= 0)
|
||||||
delete_sem(si.vertBlankSem);
|
delete_sem(si.vertBlankSem);
|
||||||
si.vertBlankSem = -1;
|
si.vertBlankSem = -1;
|
||||||
@@ -1098,7 +1113,8 @@ device_ioctl(void* dev, uint32 msg, void* buffer, size_t bufferLength)
|
|||||||
{
|
{
|
||||||
DeviceInfo& di = *((DeviceInfo*)dev);
|
DeviceInfo& di = *((DeviceInfo*)dev);
|
||||||
|
|
||||||
// TRACE("device_ioctl(); ioctl: %lu, buffer: 0x%08lx, bufLen: %lu\n", msg, (uint32)buffer, bufferLength);
|
// TRACE("device_ioctl(); ioctl: %lu, buffer: 0x%08lx, bufLen: %lu\n", msg,
|
||||||
|
// (uint32)buffer, bufferLength);
|
||||||
|
|
||||||
switch (msg) {
|
switch (msg) {
|
||||||
case B_GET_ACCELERANT_SIGNATURE:
|
case B_GET_ACCELERANT_SIGNATURE:
|
||||||
|
|||||||
Reference in New Issue
Block a user