intel_extreme: haswell+ has DDI, no DP, so block scanning that for screens.

headers/private/graphics/intel_extreme/intel_extreme.h

@@ -637,6 +637,20 @@ struct intel_free_graphics_memory {
 #define 	DDI_PORT_WIDTH(width)		(((width) - 1) << 1)
 #define 	DDI_INIT_DISPLAY_DETECTED	(1 << 0)
 
+#define PIPE_DDI_FUNC_CTL_A				(0x0400 | REGS_NORTH_PIPE_AND_PORT)
+#define PIPE_DDI_FUNC_CTL_B				(0x1400 | REGS_NORTH_PIPE_AND_PORT)
+#define PIPE_DDI_FUNC_CTL_C				(0x2400 | REGS_NORTH_PIPE_AND_PORT)
+#define PIPE_DDI_FUNC_CTL_EDP			(0xF400 | REGS_NORTH_PIPE_AND_PORT)
+#define PIPE_DDI_FUNC_CTL_ENABLE		(1 << 31)
+#define PIPE_DDI_SELECT_SHIFT			28
+#define PIPE_DDI_SELECT_PORT(x)			((x) << PIPE_DDI_SELECT_SHIFT)
+#define PIPE_DDI_SELECT_MASK			(7 << PIPE_DDI_SELECT_SHIFT)
+#define PIPE_DDI_PORT_NONE				0
+#define PIPE_DDI_PORT_B					1
+#define PIPE_DDI_PORT_C					2
+#define PIPE_DDI_PORT_D					3
+#define PIPE_DDI_PORT_E					4
+
 // DP_A always @ 6xxxx, DP_B-DP_D move with PCH
 #define INTEL_DISPLAY_PORT_A			(0x4000 | REGS_NORTH_PIPE_AND_PORT)
 #define INTEL_DISPLAY_PORT_B			(0x4100 | REGS_SOUTH_TRANSCODER_PORT)

src/add-ons/accelerants/intel_extreme/Ports.cpp

@@ -238,7 +238,8 @@ Port::PipePreference()
 	// - Later devices add a pipe C alongside the added transcoder C.
 
 	// FIXME How's this setup in newer gens? Currently return INTEL_PIPE_ANY there..
-	if (gInfo->shared_info->device_type.Generation() <= 7) {
+	if ((gInfo->shared_info->device_type.Generation() <= 7) &&
+		(!gInfo->shared_info->device_type.HasDDI())) {
 		uint32 portState = read32(_PortRegister());
 		if (gInfo->shared_info->pch_info == INTEL_PCH_CPT) {
 			portState &= PORT_TRANS_SEL_MASK;
@@ -254,6 +255,10 @@ Port::PipePreference()
 		}
 	}
 
+	if (gInfo->shared_info->device_type.HasDDI()) {
+		//fixme implement detection via PIPE_DDI_FUNC_CTL_x scan..
+	}
+
 	return INTEL_PIPE_ANY;
 }
 
@@ -1182,9 +1187,12 @@ DigitalDisplayInterface::SetDisplayMode(display_mode* target, uint32 colorMode)
 	PanelFitter* fitter = fPipe->PFT();
 	if (fitter != NULL)
 		fitter->Enable(*target);
-	FDILink* link = fPipe->FDI();
+	// Skip FDI if we have a CPU connected display
-	if (link != NULL)
+	if (PortIndex() != INTEL_PORT_A) {
-		link->Train(target);
+		FDILink* link = fPipe->FDI();
+		if (link != NULL)
+			link->Train(target);
+	}
 
 	pll_divisors divisors;
 	compute_pll_divisors(target, &divisors, false);

src/add-ons/accelerants/intel_extreme/accelerant.cpp

@@ -246,18 +246,21 @@ probe_ports()
 	bool foundDP = false;
 	bool foundDDI = false;
 
-	gInfo->port_count = 0;
+	// Display Port
-	for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) {
+	if (!gInfo->shared_info->device_type.HasDDI()) {
-		TRACE("Probing DisplayPort %d\n", i);
+		gInfo->port_count = 0;
-		Port* displayPort = new(std::nothrow) DisplayPort((port_index)i);
+		for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) {
-		if (displayPort == NULL)
+			TRACE("Probing DisplayPort %d\n", i);
-			return B_NO_MEMORY;
+			Port* displayPort = new(std::nothrow) DisplayPort((port_index)i);
+			if (displayPort == NULL)
+				return B_NO_MEMORY;
 
-		if (displayPort->IsConnected()) {
+			if (displayPort->IsConnected()) {
-			foundDP = true;
+				foundDP = true;
-			gInfo->ports[gInfo->port_count++] = displayPort;
+				gInfo->ports[gInfo->port_count++] = displayPort;
-		} else
+			} else
-			delete displayPort;
+				delete displayPort;
+		}
 	}
 
 	// Digital Display Interface