diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c index d0eff07fc4..494531dc8c 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c @@ -108,20 +108,57 @@ status_t nv_crtc_set_timing(display_mode target) /* setup fixed modeline for flatpanel if connected and active */ if (si->ps.tmds1_active) { + display_mode p1, p2; + bool pan1, pan2; + LOG(2,("CRTC: DFP active: tuning modeline\n")); + get_panel_modelines(&p1, &p2, &pan1, &pan2); + /* horizontal timing */ - //fixme (?): maybe we need real modeline calculations here... //testing (640x480): total = 135% is too much, 120% to small... //total = display + 160 equals panel modeline: but must be smaller...? - target.timing.h_total = target.timing.h_display + 152;//160;//128 - target.timing.h_sync_start = target.timing.h_total - 136;//144;//112 - target.timing.h_sync_end = target.timing.h_total - 40;//48;//16 +// target.timing.h_total = target.timing.h_display + 152;//160;//128 +// target.timing.h_sync_start = target.timing.h_total - 136;//144;//112 +// target.timing.h_sync_end = target.timing.h_total - 40;//48;//16 + //adaptive to panel: fixme: test on 4:3 and 16:10 panels! + target.timing.h_sync_start = + ((uint16)((p1.timing.h_sync_start / ((float)p1.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + target.timing.h_sync_end = + ((uint16)((p1.timing.h_sync_end / ((float)p1.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + target.timing.h_total = + ((uint16)((p1.timing.h_total / ((float)p1.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + if (target.timing.h_sync_start == target.timing.h_display) + target.timing.h_sync_start += 8; + if (target.timing.h_sync_end == target.timing.h_total) + target.timing.h_sync_end -= 8; /* vertical timing */ - target.timing.v_total = target.timing.v_display + 6; - target.timing.v_sync_start = target.timing.v_total - 3; - target.timing.v_sync_end = target.timing.v_total - 2; +// target.timing.v_total = target.timing.v_display + 6; +// target.timing.v_sync_start = target.timing.v_total - 3; +// target.timing.v_sync_end = target.timing.v_total - 2; + target.timing.v_sync_start = + ((uint16)((p1.timing.v_sync_start / ((float)p1.timing.v_display)) * + target.timing.v_display)); + + target.timing.v_sync_end = + ((uint16)((p1.timing.v_sync_end / ((float)p1.timing.v_display)) * + target.timing.v_display)); + + target.timing.v_total = + ((uint16)((p1.timing.v_total / ((float)p1.timing.v_display)) * + target.timing.v_display)); + + if (target.timing.v_sync_start == target.timing.v_display) + target.timing.v_sync_start += 1; + if (target.timing.v_sync_end == target.timing.v_total) + target.timing.v_sync_end -= 1; /* disable GPU scaling testmode so automatic scaling will be done */ DACW(FP_DEBUG1, 0); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c index b2ac060446..1503eb4655 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c @@ -94,20 +94,57 @@ status_t nv_crtc2_set_timing(display_mode target) /* setup fixed modeline for flatpanel if connected and active */ if (si->ps.tmds2_active) { + display_mode p1, p2; + bool pan1, pan2; + LOG(2,("CRTC2: DFP active: tuning modeline\n")); + get_panel_modelines(&p1, &p2, &pan1, &pan2); + /* horizontal timing */ - //fixme (?): maybe we need real modeline calculations here... //testing (640x480): total = 135% is too much, 120% to small... //total = display + 160 equals panel modeline: but must be smaller...? - target.timing.h_total = target.timing.h_display + 152;//160;//128 - target.timing.h_sync_start = target.timing.h_total - 136;//144;//112 - target.timing.h_sync_end = target.timing.h_total - 40;//48;//16 +// target.timing.h_total = target.timing.h_display + 152;//160;//128 +// target.timing.h_sync_start = target.timing.h_total - 136;//144;//112 +// target.timing.h_sync_end = target.timing.h_total - 40;//48;//16 + //adaptive to panel: fixme: test on 4:3 and 16:10 panels! + target.timing.h_sync_start = + ((uint16)((p2.timing.h_sync_start / ((float)p2.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + target.timing.h_sync_end = + ((uint16)((p2.timing.h_sync_end / ((float)p2.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + target.timing.h_total = + ((uint16)((p2.timing.h_total / ((float)p2.timing.h_display)) * + target.timing.h_display)) & 0xfff8; + + if (target.timing.h_sync_start == target.timing.h_display) + target.timing.h_sync_start += 8; + if (target.timing.h_sync_end == target.timing.h_total) + target.timing.h_sync_end -= 8; /* vertical timing */ - target.timing.v_total = target.timing.v_display + 6; - target.timing.v_sync_start = target.timing.v_total - 3; - target.timing.v_sync_end = target.timing.v_total - 2; +// target.timing.v_total = target.timing.v_display + 6; +// target.timing.v_sync_start = target.timing.v_total - 3; +// target.timing.v_sync_end = target.timing.v_total - 2; + target.timing.v_sync_start = + ((uint16)((p2.timing.v_sync_start / ((float)p2.timing.v_display)) * + target.timing.v_display)); + + target.timing.v_sync_end = + ((uint16)((p2.timing.v_sync_end / ((float)p2.timing.v_display)) * + target.timing.v_display)); + + target.timing.v_total = + ((uint16)((p2.timing.v_total / ((float)p2.timing.v_display)) * + target.timing.v_display)); + + if (target.timing.v_sync_start == target.timing.v_display) + target.timing.v_sync_start += 1; + if (target.timing.v_sync_end == target.timing.v_total) + target.timing.v_sync_end -= 1; /* disable GPU scaling testmode so automatic scaling will be done */ DAC2W(FP_DEBUG1, 0); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac.c b/src/add-ons/accelerants/nvidia/engine/nv_dac.c index f2b7e1b655..120350b2c8 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_dac.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_dac.c @@ -1,6 +1,6 @@ /* program the DAC */ /* Author: - Rudolf Cornelissen 12/2003-4/2004 + Rudolf Cornelissen 12/2003-5/2004 */ #define MODULE_BIT 0x00010000 @@ -143,18 +143,19 @@ status_t nv_dac_set_pix_pll(display_mode target) float pix_setting, req_pclk; status_t result; - /* fix a DVI or laptop flatpanel to 60Hz refresh! */ + /* fix a DVI or laptop flatpanel to 62Hz refresh! + * (we can't risk getting below 60.0Hz as some panels shut-off then!) */ /* Note: * The pixelclock drives the flatpanel modeline, not the CRTC modeline. */ if (si->ps.tmds1_active) { - LOG(4,("DAC: Fixing DFP refresh to 60Hz!\n")); + LOG(4,("DAC: Fixing DFP refresh to 62Hz!\n")); /* readout the panel's modeline to determine the needed pixelclock */ target.timing.pixel_clock = ( ((DACR(FP_HTOTAL) & 0x0000ffff) + 1) * ((DACR(FP_VTOTAL) & 0x0000ffff) + 1) * - 60) / 1000; + 62) / 1000; } req_pclk = (target.timing.pixel_clock)/1000.0; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c index 9ccd337dd1..60521f9e41 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c @@ -1,6 +1,6 @@ /* program the secondary DAC */ /* Author: - Rudolf Cornelissen 12/2003-4/2004 + Rudolf Cornelissen 12/2003-5/2004 */ #define MODULE_BIT 0x00001000 @@ -149,18 +149,19 @@ status_t nv_dac2_set_pix_pll(display_mode target) float pix_setting, req_pclk; status_t result; - /* fix a DVI or laptop flatpanel to 60Hz refresh! */ + /* fix a DVI or laptop flatpanel to 62Hz refresh! + * (we can't risk getting below 60.0Hz as some panels shut-off then!) */ /* Note: * The pixelclock drives the flatpanel modeline, not the CRTC modeline. */ if (si->ps.tmds2_active) { - LOG(4,("DAC2: Fixing DFP refresh to 60Hz!\n")); + LOG(4,("DAC2: Fixing DFP refresh to 62Hz!\n")); /* readout the panel's modeline to determine the needed pixelclock */ target.timing.pixel_clock = ( ((DAC2R(FP_HTOTAL) & 0x0000ffff) + 1) * ((DAC2R(FP_VTOTAL) & 0x0000ffff) + 1) * - 60) / 1000; + 62) / 1000; } req_pclk = (target.timing.pixel_clock)/1000.0; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index 0ec1ecdfef..e76d405e9c 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -80,7 +80,7 @@ status_t nv_general_powerup() { status_t status; - LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-19 running.\n")); + LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-20 running.\n")); /* preset no laptop */ si->ps.laptop = false; diff --git a/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html b/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html index d015fdfa7e..41a9bd590f 100644 --- a/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html +++ b/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html @@ -4,13 +4,12 @@

Changes done for each driverversion:

-

head (0.10-18), (Rudolf)

+

head (0.10-20), (Rudolf)