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intel_extreme: fix wait_for_vblank on SandyBridge

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There was some mixup with the interrupt registers, still:
- The driver uses 16-bit read/write, but on SandyBridge the register is
  32 bits
- There is a global interrupt enable bit, which must be set to unmask
  everything else
- The bits for vblank interrupt are not the same on SNB and later PCH
  based devices, and the code mixed the two.

Move the computation of the interrupt bits to an helper function, and
use it everywhere to make sure we always use the right bits.
This commit is contained in:
Adrien Destugues
2016-08-26 21:45:38 +02:00
parent 580cd77d0c
commit 187ad82a62
2 changed files with 112 additions and 70 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+4
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@@ -455,12 +455,16 @@ struct intel_free_graphics_memory {
#define PCH_INTERRUPT_MASK 0x44004
#define PCH_INTERRUPT_IDENTITY 0x44008
#define PCH_INTERRUPT_ENABLED 0x4400c
#define PCH_INTERRUPT_VBLANK_PIPEA (1 << 0)
#define PCH_INTERRUPT_VBLANK_PIPEB (1 << 5)
#define PCH_INTERRUPT_VBLANK_PIPEC (1 << 10)
// SandyBridge had only two pipes, and things were shuffled aroud again with
// the introduction of pipe C.
#define PCH_INTERRUPT_VBLANK_PIPEA_SNB (1 << 7)
#define PCH_INTERRUPT_VBLANK_PIPEB_SNB (1 << 15)
#define PCH_INTERRUPT_GLOBAL_SNB (1 << 31)
// graphics port control
#define DISPLAY_MONITOR_PORT_ENABLED (1UL << 31)