From 19187c464b4598774f731cd015c4fbc893c25348 Mon Sep 17 00:00:00 2001 From: Yongcong Du Date: Tue, 3 Apr 2012 23:46:51 +0800 Subject: [PATCH] x86: Initialize IA32_MSR_ENERGY_PERF_BIAS The lowest 4 bits of the MSR serves as a hint to the hardware to favor performance or energy saving. 0 means a hint preference for highest performance while 15 corresponds to the maximum energy savings. A value of 7 translates into a hint to balance performance with energy savings. The default reset value of the MSR is 0. If BIOS doesn't intialize the MSR, the hardware will run in performance state. This patch initialize the MSR with value of 7 for balance between performance and energy savings Signed-off-by: Fredrik Holmqvist --- headers/private/kernel/arch/x86/arch_cpu.h | 1 + src/system/kernel/arch/x86/arch_cpu.cpp | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h index 4365fe13ca..2ce6bd0b4d 100644 --- a/headers/private/kernel/arch/x86/arch_cpu.h +++ b/headers/private/kernel/arch/x86/arch_cpu.h @@ -29,6 +29,7 @@ #define IA32_MSR_SYSENTER_CS 0x174 #define IA32_MSR_SYSENTER_ESP 0x175 #define IA32_MSR_SYSENTER_EIP 0x176 +#define IA32_MSR_ENERGY_PERF_BIAS 0x1b0 #define IA32_MSR_MTRR_DEFAULT_TYPE 0x2ff #define IA32_MSR_MTRR_PHYSICAL_BASE_0 0x200 #define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201 diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp b/src/system/kernel/arch/x86/arch_cpu.cpp index 09359b64a4..08f0ed2b27 100644 --- a/src/system/kernel/arch/x86/arch_cpu.cpp +++ b/src/system/kernel/arch/x86/arch_cpu.cpp @@ -70,6 +70,16 @@ static const struct cpu_vendor_info vendor_info[VENDOR_NUM] = { #define K8_CMPHALT (K8_SMIONCMPHALT | K8_C1EONCMPHALT) +/* + * 0 favors highest performance while 15 corresponds to the maximum energy + * savings. 7 means balance between performance and energy savings. + * Refer to Section 14.3.4 in for details + */ +#define ENERGY_PERF_BIAS_PERFORMANCE 0 +#define ENERGY_PERF_BIAS_BALANCE 7 +#define ENERGY_PERF_BIAS_POWERSAVE 15 + struct set_mtrr_parameter { int32 index; uint64 base; @@ -787,6 +797,16 @@ arch_cpu_init_percpu(kernel_args *args, int cpu) else gCpuIdleFunc = halt_idle; } + + if (x86_check_feature(IA32_FEATURE_EPB, FEATURE_6_ECX)) { + uint64 msr = x86_read_msr(IA32_MSR_ENERGY_PERF_BIAS); + if ((msr & 0xf) == ENERGY_PERF_BIAS_PERFORMANCE) { + msr &= ~0xf; + msr |= ENERGY_PERF_BIAS_BALANCE; + x86_write_msr(IA32_MSR_ENERGY_PERF_BIAS, msr); + } + } + return 0; }