Remove another OF leftover. If we ever support hades or milan we'll add something else there.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26037 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
François Revol
@@ -1,284 +0,0 @@
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/*
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* Copyright 2006, Ingo Weinhold <[email protected]>.
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* All rights reserved. Distributed under the terms of the MIT License.
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*/
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/*-
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* Copyright (C) 2002 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <KernelExport.h>
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#include <platform/openfirmware/devices.h>
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#include <platform/openfirmware/openfirmware.h>
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#include <platform/openfirmware/pci.h>
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#include "pci_controller.h"
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#include "pci_io.h"
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#include "pci_openfirmware_priv.h"
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struct uninorth_range {
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uint32 pci_hi;
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uint32 pci_mid;
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uint32 pci_lo;
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uint32 host;
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uint32 size_hi;
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uint32 size_lo;
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};
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struct uninorth_host_bridge {
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int device_node;
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addr_t address_registers;
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addr_t data_registers;
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uint32 bus;
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struct uninorth_range ranges[6];
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int range_count;
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};
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#define out8rb(address, value) ppc_out8((vuint8*)(address), value)
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#define out16rb(address, value) ppc_out16_reverse((vuint16*)(address), value)
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#define out32rb(address, value) ppc_out32_reverse((vuint32*)(address), value)
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#define in8rb(address) ppc_in8((const vuint8*)(address))
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#define in16rb(address) ppc_in16_reverse((const vuint16*)(address))
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#define in32rb(address) ppc_in32_reverse((const vuint32*)(address))
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static int uninorth_enable_config(struct uninorth_host_bridge *bridge,
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uint8 bus, uint8 slot, uint8 function, uint8 offset);
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static status_t uninorth_read_pci_config(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 offset, uint8 size, uint32 *value);
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static status_t uninorth_write_pci_config(void *cookie, uint8 bus,
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uint8 device, uint8 function, uint8 offset, uint8 size,
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uint32 value);
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static status_t uninorth_get_max_bus_devices(void *cookie, int32 *count);
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static status_t uninorth_read_pci_irq(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 pin, uint8 *irq);
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static status_t uninorth_write_pci_irq(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 pin, uint8 irq);
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static pci_controller sUniNorthPCIController = {
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uninorth_read_pci_config,
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uninorth_write_pci_config,
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uninorth_get_max_bus_devices,
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uninorth_read_pci_irq,
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uninorth_write_pci_irq,
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};
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static status_t
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uninorth_read_pci_config(void *cookie, uint8 bus, uint8 device, uint8 function,
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uint8 offset, uint8 size, uint32 *value)
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{
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uninorth_host_bridge *bridge = (uninorth_host_bridge*)cookie;
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addr_t caoff = bridge->data_registers + (offset & 0x07);
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if (uninorth_enable_config(bridge, bus, device, function, offset) != 0) {
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switch (size) {
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case 1:
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*value = in8rb(caoff);
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break;
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case 2:
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*value = in16rb(caoff);
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break;
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case 4:
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*value = in32rb(caoff);
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break;
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default:
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*value = 0xffffffff;
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break;
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}
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} else
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*value = 0xffffffff;
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return B_OK;
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}
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static status_t uninorth_write_pci_config(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 offset, uint8 size, uint32 value)
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{
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uninorth_host_bridge *bridge = (uninorth_host_bridge*)cookie;
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addr_t caoff = bridge->data_registers + (offset & 0x07);
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if (uninorth_enable_config(bridge, bus, device, function, offset)) {
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switch (size) {
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case 1:
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out8rb(caoff, (uint8)value);
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(void)in8rb(caoff);
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break;
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case 2:
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out16rb(caoff, (uint16)value);
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(void)in16rb(caoff);
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break;
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case 4:
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out32rb(caoff, value);
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(void)in32rb(caoff);
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break;
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}
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}
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return B_OK;
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}
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static status_t uninorth_get_max_bus_devices(void *cookie, int32 *count)
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{
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*count = 32;
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return B_OK;
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}
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static status_t uninorth_read_pci_irq(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 pin, uint8 *irq)
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{
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return B_ERROR;
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}
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static status_t uninorth_write_pci_irq(void *cookie, uint8 bus, uint8 device,
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uint8 function, uint8 pin, uint8 irq)
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{
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return B_ERROR;
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}
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// #pragma mark -
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static int
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uninorth_enable_config(struct uninorth_host_bridge *bridge, uint8 bus,
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uint8 slot, uint8 function, uint8 offset)
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{
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// uint32 pass;
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// if (resource_int_value(device_get_name(sc->sc_dev),
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// device_get_unit(sc->sc_dev), "skipslot", &pass) == 0) {
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// if (pass == slot)
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// return (0);
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// }
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uint32 cfgval;
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if (bridge->bus == bus) {
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/*
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* No slots less than 11 on the primary bus
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*/
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if (slot < 11)
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return (0);
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cfgval = (1 << slot) | (function << 8) | (offset & 0xfc);
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} else {
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cfgval = (bus << 16) | (slot << 11) | (function << 8) |
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(offset & 0xfc) | 1;
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}
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do {
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out32rb(bridge->address_registers, cfgval);
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} while (in32rb(bridge->address_registers) != cfgval);
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return (1);
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}
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// #pragma mark -
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status_t
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ppc_openfirmware_probe_uninorth(int deviceNode,
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const StringArrayPropertyValue &compatibleValue)
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{
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if (!compatibleValue.ContainsElement("uni-north"))
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return B_ERROR;
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uint32 reg[2];
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if (of_getprop(deviceNode, "reg", reg, sizeof(reg)) < 8)
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return B_ERROR;
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uint32 busrange[2];
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if (of_getprop(deviceNode, "bus-range", busrange, sizeof(busrange)) != 8)
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return B_ERROR;
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uninorth_host_bridge *bridge
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= (uninorth_host_bridge*)malloc(sizeof(uninorth_host_bridge));
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if (!bridge)
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return B_NO_MEMORY;
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bridge->device_node = deviceNode;
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bridge->address_registers = reg[0] + 0x800000;
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bridge->data_registers = reg[0] + 0xc00000;
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bridge->bus = busrange[0];
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// TODO: Check whether address and data registers have already been mapped by
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// the Open Firmware. If not, map them ourselves.
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memset(bridge->ranges, 0, sizeof(bridge->ranges));
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int bytesRead = of_getprop(deviceNode, "ranges", bridge->ranges,
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sizeof(bridge->ranges));
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if (bytesRead < 0) {
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dprintf("ppc_openfirmware_probe_uninorth: Could not get ranges.\n");
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return B_ERROR;
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}
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bridge->range_count = bytesRead / sizeof(uninorth_range);
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uninorth_range *ioRange = NULL;
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uninorth_range *memoryRanges[2];
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int memoryRangeCount = 0;
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for (int i = 0; i < bridge->range_count; i++) {
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uninorth_range *range = bridge->ranges + i;
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switch (range->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
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case OFW_PCI_PHYS_HI_SPACE_CONFIG:
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break;
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case OFW_PCI_PHYS_HI_SPACE_IO:
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ioRange = range;
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM32:
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memoryRanges[memoryRangeCount++] = range;
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM64:
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break;
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}
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}
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if (ioRange == NULL) {
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dprintf("ppc_openfirmware_probe_uninorth: Can't find io range.\n");
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return B_ERROR;
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}
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if (memoryRangeCount == 0) {
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dprintf("ppc_openfirmware_probe_uninorth: Can't find mem ranges.\n");
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return B_ERROR;
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}
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status_t error = pci_controller_add(&sUniNorthPCIController, bridge);
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if (error != B_OK)
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free(bridge);
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return error;
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}
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