Minor code cleanup. No functional changes.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@38972 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -23,9 +23,6 @@
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#include <string.h>
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#include <string.h>
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#include <board_config.h>
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//#define TRACE_MMU
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//#define TRACE_MMU
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#ifdef TRACE_MMU
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#ifdef TRACE_MMU
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@@ -80,72 +77,6 @@ struct memblock {
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};
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};
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//Memory map of the whole memory
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static struct memblock MEMORYMAP[] = {
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{
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"ROM", 0x00000000, 0x12345467, MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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{
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"devices",
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0x48000000,
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0x48FFFFFF,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
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},
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{
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"RAM",
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0x80000000,
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0x9FFFFFFF,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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};
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//memory used by the loader that should be identity mapped
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#if 0/*BOARD_CPU_OMAP3*/
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static struct memblock LOADER_MEMORYMAP[] = {
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{
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"vectors",//interrupt vectors
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0x00000000,
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0x00000fff,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
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},
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{
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"devices",
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0x48000000,
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0x48FFFFFF,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
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},
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{
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"RAM_image",//15MB for the initrd should be enough..
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0x80000000,
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0x80ffffff,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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{
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"RAM_loader",//1MB loader
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0x81000000,
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0x810fffff,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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{
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"RAM_pt",//Page Table 1MB
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0x81100000,
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0x811FFFFF,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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{
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"RAM_free",//14MB free RAM (actually more but we don't identity map it automaticaly)
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0x81200000,
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0x82000000,
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MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
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},
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};
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#else
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static struct memblock LOADER_MEMORYMAP[] = {
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static struct memblock LOADER_MEMORYMAP[] = {
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{
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{
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"vectors",//interrupt vectors
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"vectors",//interrupt vectors
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@@ -198,25 +129,11 @@ static struct memblock LOADER_MEMORYMAP[] = {
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MMU_L2_FLAG_AP_RW|MMU_L2_FLAG_C,
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MMU_L2_FLAG_AP_RW|MMU_L2_FLAG_C,
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},
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},
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#endif
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#endif
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};
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};
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#endif
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//static const uint32 kDefaultPageTableFlags = MMU_FLAG_READWRITE; // not cached not buffered, R/W
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//static const uint32 kDefaultPageTableFlags = MMU_FLAG_READWRITE; // not cached not buffered, R/W
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static const size_t kMaxKernelSize = 0x200000; // 2 MB for the kernel
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static const size_t kMaxKernelSize = 0x200000; // 2 MB for the kernel
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static addr_t sNextPhysicalAddress = 0; //will be set by mmu_init
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static addr_t sNextPhysicalAddress = 0; //will be set by mmu_init
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static addr_t sNextVirtualAddress = KERNEL_BASE + kMaxKernelSize;
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static addr_t sNextVirtualAddress = KERNEL_BASE + kMaxKernelSize;
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static addr_t sMaxVirtualAddress = KERNEL_BASE + kMaxKernelSize;
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static addr_t sMaxVirtualAddress = KERNEL_BASE + kMaxKernelSize;
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@@ -225,21 +142,12 @@ static addr_t sNextPageTableAddress = 0;
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//the page directory is in front of the pagetable
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//the page directory is in front of the pagetable
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static uint32 kPageTableRegionEnd = 0;
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static uint32 kPageTableRegionEnd = 0;
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// working page directory and page table
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// working page directory and page table
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static uint32 *sPageDirectory = 0 ;
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static uint32 *sPageDirectory = 0 ;
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//page directory has to be on a multiple of 16MB for
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//page directory has to be on a multiple of 16MB for
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//some arm processors
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//some arm processors
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static addr_t
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static addr_t
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get_next_virtual_address(size_t size)
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get_next_virtual_address(size_t size)
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{
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{
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@@ -249,11 +157,11 @@ get_next_virtual_address(size_t size)
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return address;
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return address;
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}
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}
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static addr_t
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static addr_t
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get_next_virtual_address_alligned (size_t size, uint32 mask)
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get_next_virtual_address_alligned (size_t size, uint32 mask)
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{
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{
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TRACE(("MUH"));
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TRACE(("\n NEXT VIRRUADRSSS: %lx\n", sNextVirtualAddress));
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TRACE(("\n\n NEXT VIRRUADRSSS: %lx\n", sNextVirtualAddress));
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addr_t address = (sNextVirtualAddress) & mask ;
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addr_t address = (sNextVirtualAddress) & mask ;
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TRACE(("ADDR: %lx\n", address));
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TRACE(("ADDR: %lx\n", address));
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@@ -297,7 +205,6 @@ get_next_physical_page(size_t pagesize)
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}
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}
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void
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void
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mmu_set_TTBR(uint32 ttb)
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mmu_set_TTBR(uint32 ttb)
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{
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{
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@@ -313,6 +220,7 @@ mmu_flush_TLB()
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asm volatile("MCR p15, 0, %[c8format], c8, c7, 0"::[c8format] "r" (bla) ); /* flush TLB */
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asm volatile("MCR p15, 0, %[c8format], c8, c7, 0"::[c8format] "r" (bla) ); /* flush TLB */
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}
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}
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uint32
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uint32
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mmu_read_C1()
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mmu_read_C1()
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{
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{
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@@ -321,12 +229,14 @@ mmu_read_C1()
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return bla;
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return bla;
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}
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}
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void
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void
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mmu_write_C1(uint32 value)
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mmu_write_C1(uint32 value)
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{
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{
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asm volatile("MCR p15, 0, %[c1in], c1, c0, 0"::[c1in] "r" (value));
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asm volatile("MCR p15, 0, %[c1in], c1, c0, 0"::[c1in] "r" (value));
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}
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}
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void
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void
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mmu_write_DACR(uint32 value)
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mmu_write_DACR(uint32 value)
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{
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{
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@@ -383,7 +293,7 @@ init_page_directory()
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for (uint32 i=0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++){
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for (uint32 i=0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++){
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pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
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pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
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TRACE(("BLOCK: %s START: %lx END %lx",LOADER_MEMORYMAP[i].name,LOADER_MEMORYMAP[i].start,LOADER_MEMORYMAP[i].end));
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TRACE(("BLOCK: %s START: %lx END %lx\n",LOADER_MEMORYMAP[i].name,LOADER_MEMORYMAP[i].start,LOADER_MEMORYMAP[i].end));
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addr_t pos = LOADER_MEMORYMAP[i].start;
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addr_t pos = LOADER_MEMORYMAP[i].start;
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int c=0;
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int c=0;
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while(pos< LOADER_MEMORYMAP[i].end){
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while(pos< LOADER_MEMORYMAP[i].end){
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@@ -416,8 +326,6 @@ init_page_directory()
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}
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}
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}
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}
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mmu_flush_TLB();
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mmu_flush_TLB();
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/* set up the translation table base */
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/* set up the translation table base */
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@@ -428,15 +336,8 @@ init_page_directory()
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/* set up the domain access register */
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/* set up the domain access register */
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mmu_write_DACR(0xFFFFFFFF);
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mmu_write_DACR(0xFFFFFFFF);
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dprintf("hallo1\n");
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/* turn on the mmu */
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/* turn on the mmu */
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mmu_write_C1(mmu_read_C1() | 0x1);
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mmu_write_C1(mmu_read_C1() | 0x1);
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dprintf("hallo\n");
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}
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}
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/*! Adds a new page table for the specified base address */
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/*! Adds a new page table for the specified base address */
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@@ -464,9 +365,6 @@ add_page_table(addr_t base)
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}
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}
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/*! Creates an entry to map the specified virtualAddress to the given
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/*! Creates an entry to map the specified virtualAddress to the given
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physicalAddress.
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physicalAddress.
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If the mapping goes beyond the current page table, it will allocate
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If the mapping goes beyond the current page table, it will allocate
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@@ -484,7 +382,6 @@ map_page(addr_t virtualAddress, addr_t physicalAddress, uint32 flags)
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if (virtualAddress >= sMaxVirtualAddress) {
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if (virtualAddress >= sMaxVirtualAddress) {
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// we need to add a new page table
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// we need to add a new page table
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add_page_table(sMaxVirtualAddress);
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add_page_table(sMaxVirtualAddress);
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sMaxVirtualAddress += B_PAGE_SIZE * 256;
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sMaxVirtualAddress += B_PAGE_SIZE * 256;
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@@ -517,17 +414,12 @@ map_page(addr_t virtualAddress, addr_t physicalAddress, uint32 flags)
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pageTable[tableEntry] = physicalAddress | flags;
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pageTable[tableEntry] = physicalAddress | flags;
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mmu_flush_TLB();
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mmu_flush_TLB();
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TRACE(("map_page: done\n"));
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TRACE(("map_page: done\n"));
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}
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}
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// #pragma mark -
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// #pragma mark -
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@@ -547,7 +439,6 @@ mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags)
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}
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}
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static void
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static void
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unmap_page(addr_t virtualAddress)
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unmap_page(addr_t virtualAddress)
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{
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{
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@@ -568,7 +459,6 @@ unmap_page(addr_t virtualAddress)
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}
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}
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extern "C" void *
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extern "C" void *
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mmu_allocate(void *virtualAddress, size_t size)
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mmu_allocate(void *virtualAddress, size_t size)
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{
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{
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@@ -589,8 +479,9 @@ mmu_allocate(void *virtualAddress, size_t size)
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// is the address within the valid range?
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// is the address within the valid range?
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if (address < KERNEL_BASE
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if (address < KERNEL_BASE
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|| address + size >= KERNEL_BASE + kMaxKernelSize){
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|| address + size >= KERNEL_BASE + kMaxKernelSize){
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TRACE(("mmu_allocate in illegal range\n address: %lx KERNELBASE: %lx KERNEL_BASE + kMaxKernelSize: %lx address + size : %lx \n ", (uint32)address , KERNEL_BASE, KERNEL_BASE
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TRACE(("mmu_allocate in illegal range\n address: %lx"
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+ kMaxKernelSize,(uint32)(address + size) ));
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" KERNELBASE: %lx KERNEL_BASE + kMaxKernelSize: %lx address + size : %lx \n ",
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(uint32)address , KERNEL_BASE, KERNEL_BASE + kMaxKernelSize,(uint32)(address + size)));
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return NULL;
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return NULL;
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}
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}
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for (uint32 i = 0; i < size; i++) {
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for (uint32 i = 0; i < size; i++) {
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