From 1fca5eaf116609013ea078eac249e20fe8a87098 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Mon, 10 Oct 2011 16:46:22 +0000 Subject: [PATCH] * detect hdmi and tv and set as such * set encoder flags the same as connector flags * add curly comments to make troubleshooting clearer * program encoder dpms scratch registers git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42818 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/radeon_hd/display.cpp | 35 +++++--- src/add-ons/accelerants/radeon_hd/encoder.cpp | 79 ++++++++++++++++++- src/add-ons/accelerants/radeon_hd/encoder.h | 3 +- src/add-ons/accelerants/radeon_hd/mode.cpp | 4 +- src/add-ons/accelerants/radeon_hd/pll.cpp | 4 +- 5 files changed, 109 insertions(+), 16 deletions(-) diff --git a/src/add-ons/accelerants/radeon_hd/display.cpp b/src/add-ons/accelerants/radeon_hd/display.cpp index 2f6f3e0bbb..b991326c59 100644 --- a/src/add-ons/accelerants/radeon_hd/display.cpp +++ b/src/add-ons/accelerants/radeon_hd/display.cpp @@ -6,6 +6,11 @@ * Alexander von Gluck, kallisti5@unixzen.com */ +/* + * It's dangerous to go alone, take this! + * framebuffer -> crtc -> encoder -> transmitter -> connector -> monitor + */ + #include "accelerant_protos.h" #include "accelerant.h" @@ -398,7 +403,6 @@ detect_connectors() continue; } - uint16 igp_lane_info; if (0) ERROR("%s: TODO : IGP chip connector detection\n", __func__); @@ -426,6 +430,7 @@ detect_connectors() uint8 grph_obj_type = (B_LENDIAN_TO_HOST_INT16(path->usGraphicObjIds[j]) & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; + if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { // Found an encoder // TODO : it may be possible to have more then one encoder @@ -535,6 +540,9 @@ detect_connectors() TRACE("%s: Path #%" B_PRId32 ": Found encoder " "%s\n", __func__, i, get_encoder_name(encoder_type)); + + gConnector[connector_index]->encoder.flags + = connector_flags; gConnector[connector_index]->encoder.valid = true; gConnector[connector_index]->encoder.object_id @@ -543,9 +551,10 @@ detect_connectors() = encoder_type; } } + // END if object is encoder } else if (grph_obj_type == GRAPH_OBJECT_TYPE_ROUTER) { ERROR("%s: TODO : Found router object?\n", __func__); - } + } // END if object is router } // Set up information buses such as ddc @@ -593,6 +602,7 @@ detect_connectors() // TODO : aux chan transactions + // record connector information TRACE("%s: Path #%" B_PRId32 ": Found %s (0x%" B_PRIX32 ")\n", __func__, i, get_connector_name(connector_type), connector_type); @@ -603,16 +613,23 @@ detect_connectors() gConnector[connector_index]->object_id = connector_object_id; - if (connector_type == VIDEO_CONNECTOR_COMPOSITE - || connector_type == VIDEO_CONNECTOR_SVIDEO - || connector_type == VIDEO_CONNECTOR_9DIN) { - gConnector[connector_index]->encoder.is_tv = true; - } else { - gConnector[connector_index]->encoder.is_tv = false; + gConnector[connector_index]->encoder.is_tv = false; + gConnector[connector_index]->encoder.is_hdmi = false; + + switch(connector_type) { + case VIDEO_CONNECTOR_COMPOSITE: + case VIDEO_CONNECTOR_SVIDEO: + case VIDEO_CONNECTOR_9DIN: + gConnector[connector_index]->encoder.is_tv = true; + break; + case VIDEO_CONNECTOR_HDMIA: + case VIDEO_CONNECTOR_HDMIB: + gConnector[connector_index]->encoder.is_hdmi = true; + break; } connector_index++; - } + } // END for each valid connector } // end for each display path return B_OK; diff --git a/src/add-ons/accelerants/radeon_hd/encoder.cpp b/src/add-ons/accelerants/radeon_hd/encoder.cpp index 46ebf8b5d1..0ee777b59f 100644 --- a/src/add-ons/accelerants/radeon_hd/encoder.cpp +++ b/src/add-ons/accelerants/radeon_hd/encoder.cpp @@ -366,7 +366,82 @@ encoder_analog_setup(uint8 id, uint32 pixelClock, int command) void -encoder_dpms_set(uint8 encoder_id, int mode) +encoder_dpms_scratch(uint8 crtc_id, bool power) +{ + TRACE("%s: power: %s\n", __func__, power ? "true" : "false"); + + uint32 connector_index = gDisplay[crtc_id]->connector_index; + uint32 encoder_flags = gConnector[connector_index]->encoder.flags; + + // TODO : r500 + uint32 bios_2_scratch = Read32(OUT, R600_BIOS_2_SCRATCH); + + if (encoder_flags & ATOM_DEVICE_TV1_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_CV_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_CV_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_DFP4_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE; + } + if (encoder_flags & ATOM_DEVICE_DFP5_SUPPORT) { + if (power == true) + bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE; + else + bios_2_scratch |= ATOM_S2_DFP5_DPMS_STATE; + } + Write32(OUT, R600_BIOS_2_SCRATCH, bios_2_scratch); +} + + +void +encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode) { int index = 0; DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; @@ -430,6 +505,7 @@ encoder_dpms_set(uint8 encoder_id, int mode) atom_execute_table(gAtomContext, index, (uint32*)&args); // TODO : ATOM_DEVICE_LCD_SUPPORT : args.ucAction = ATOM_LCD_BLON; // execute again + encoder_dpms_scratch(crtc_id, true); break; case B_DPMS_STAND_BY: case B_DPMS_SUSPEND: @@ -438,6 +514,7 @@ encoder_dpms_set(uint8 encoder_id, int mode) atom_execute_table(gAtomContext, index, (uint32*)&args); // TODO : ATOM_DEVICE_LCD_SUPPORT : args.ucAction = ATOM_LCD_BLOFF; // execute again + encoder_dpms_scratch(crtc_id, false); break; } } diff --git a/src/add-ons/accelerants/radeon_hd/encoder.h b/src/add-ons/accelerants/radeon_hd/encoder.h index 0ed892b798..e4011c07b1 100644 --- a/src/add-ons/accelerants/radeon_hd/encoder.h +++ b/src/add-ons/accelerants/radeon_hd/encoder.h @@ -14,7 +14,8 @@ void encoder_mode_set(uint8 id, uint32 pixelClock); status_t encoder_digital_setup(uint8 id, uint32 pixelClock, int command); status_t encoder_analog_setup(uint8 id, uint32 pixelClock, int command); void encoder_output_lock(bool lock); -void encoder_dpms_set(uint8 encoder_id, int mode); +void encoder_dpms_scratch(uint8 crtc_id, bool power); +void encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode); #endif /* RADEON_HD_ENCODER_H */ diff --git a/src/add-ons/accelerants/radeon_hd/mode.cpp b/src/add-ons/accelerants/radeon_hd/mode.cpp index d86dc3d016..39226911ea 100644 --- a/src/add-ons/accelerants/radeon_hd/mode.cpp +++ b/src/add-ons/accelerants/radeon_hd/mode.cpp @@ -144,7 +144,7 @@ radeon_set_display_mode(display_mode *mode) // *** encoder prep encoder_output_lock(true); - encoder_dpms_set(gConnector[connector_index]->encoder.object_id, + encoder_dpms_set(id, gConnector[connector_index]->encoder.object_id, B_DPMS_OFF); encoder_assign_crtc(id); @@ -175,7 +175,7 @@ radeon_set_display_mode(display_mode *mode) display_crtc_lock(id, ATOM_DISABLE); // *** encoder commit - encoder_dpms_set(gConnector[connector_index]->encoder.object_id, + encoder_dpms_set(id, gConnector[connector_index]->encoder.object_id, B_DPMS_ON); encoder_output_lock(false); } diff --git a/src/add-ons/accelerants/radeon_hd/pll.cpp b/src/add-ons/accelerants/radeon_hd/pll.cpp index 3591ca33e0..97c53329db 100644 --- a/src/add-ons/accelerants/radeon_hd/pll.cpp +++ b/src/add-ons/accelerants/radeon_hd/pll.cpp @@ -233,7 +233,5 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id) TRACE("%s: setting pixel clock %" B_PRIu32 "\n", __func__, pixelClock); - atom_execute_table(gAtomContext, index, (uint32 *)&args); - - return B_OK; + return atom_execute_table(gAtomContext, index, (uint32 *)&args); }