From 20a0dfd5b0b5206d4adcd3ebe6a6b9e9879bace8 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Sat, 13 Mar 2004 11:35:31 +0000 Subject: [PATCH] corrected checked DFP panel git-svn-id: file:///srv/svn/repos/haiku/trunk/current@6959 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_crtc2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c index da431ed268..7ece4c6016 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c @@ -230,8 +230,8 @@ status_t nv_crtc2_set_timing(display_mode target) uint32 iscale_x, iscale_y; //fixme: checkout upscaling and aspect!!! - iscale_x = ((4096 * target.timing.h_display) / si->ps.panel1_width); - iscale_y = ((4096 * target.timing.v_display) / si->ps.panel1_height); + iscale_x = ((4096 * target.timing.h_display) / si->ps.panel2_width); + iscale_y = ((4096 * target.timing.v_display) / si->ps.panel2_height); DAC2W(FP_DEBUG3, (iscale_x & 0x00001fff) | ((iscale_y & 0x00001fff) << 16)); /* limit last fetched line if vertical scaling is done */