intel_extreme: Make sure we power up the panel after modesetting

This commit is contained in:
Alexander von Gluck IV
2015-11-11 17:25:46 -06:00
parent de04810814
commit 222f5929cf
2 changed files with 18 additions and 5 deletions
@@ -196,11 +196,11 @@ DisplayPipe::ConfigureTimings(const pll_divisors& divisors, uint32 pixelClock,
<< DISPLAY_PLL_IGD_POST1_DIVISOR_SHIFT)
& DISPLAY_PLL_IGD_POST1_DIVISOR_MASK;
} else {
pll |= ((1 << (divisors.post1 - 1))
<< DISPLAY_PLL_POST1_DIVISOR_SHIFT)
& DISPLAY_PLL_9xx_POST1_DIVISOR_MASK;
// pll |= ((divisors.post1 - 1) << DISPLAY_PLL_POST1_DIVISOR_SHIFT)
// pll |= ((1 << (divisors.post1 - 1))
// << DISPLAY_PLL_POST1_DIVISOR_SHIFT)
// & DISPLAY_PLL_9xx_POST1_DIVISOR_MASK;
pll |= ((divisors.post1 - 1) << DISPLAY_PLL_POST1_DIVISOR_SHIFT)
& DISPLAY_PLL_9xx_POST1_DIVISOR_MASK;
}
if (divisors.post2_high)
pll |= DISPLAY_PLL_DIVIDE_HIGH;
@@ -220,7 +220,6 @@ DisplayPipe::ConfigureTimings(const pll_divisors& divisors, uint32 pixelClock,
pll |= DISPLAY_PLL_POST1_DIVIDE_2;
}
write32(pllControl, pll);
read32(pllControl);
spin(150);
@@ -468,6 +468,20 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
fDisplayPipe->ConfigureTimings(divisors, target->timing.pixel_clock,
extraPLLFlags);
// Power on Panel
addr_t panelControl = INTEL_PANEL_CONTROL;
addr_t panelStatus = INTEL_PANEL_STATUS;
if (gInfo->shared_info->device_type.HasPlatformControlHub()) {
panelControl = PCH_PANEL_CONTROL;
panelStatus = PCH_PANEL_STATUS;
}
write32(panelControl, read32(panelControl) | PANEL_CONTROL_POWER_TARGET_ON);
// TODO: A wait_for power on status to be set would be better here
spin(1000);
if ((read32(panelStatus) & PANEL_STATUS_POWER_ON) == 0)
ERROR("%s: %s didn't power on in 250ms!\n", __func__, PortName());
// Program target display mode
fDisplayPipe->Enable(target, _PortRegister());