diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
index f731aba4e4..d0a6992942 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
@@ -266,10 +266,6 @@ status_t nv_crtc_set_timing(display_mode target)
 	{
 		uint32 iscale_x, iscale_y;
 
-		/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink) transmitters */
-//fixme: remove once DPMS confirmed OK!
-//		DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));
-
 		/* calculate inverse scaling factors used by hardware in 20.12 format */
 		iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width);
 		iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height);
@@ -443,7 +439,8 @@ status_t nv_crtc_dpms(bool display, bool h, bool v)
 		/* end synchronous reset if display should be enabled */
 		SEQW(RESET, 0x03);
 
-		if (si->ps.tmds1_active)
+		//'safe mode' test! feedback needed with this 'setting'!
+		if (0)//si->ps.tmds1_active)
 		{
 			/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
 			 * internal transmitters... */
@@ -463,7 +460,8 @@ status_t nv_crtc_dpms(bool display, bool h, bool v)
 	{
 		SEQW(CLKMODE, (temp | 0x20));
 
-		if (si->ps.tmds1_active)
+		//'safe mode' test! feedback needed with this 'setting'!
+		if (0)//si->ps.tmds1_active)
 		{
 			/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
 			 * internal transmitters... */
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
index 845eef8e59..80de523e38 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
@@ -249,10 +249,6 @@ status_t nv_crtc2_set_timing(display_mode target)
 	{
 		uint32 iscale_x, iscale_y;
 
-		/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink) transmitters */
-//fixme: remove once DPMS confirmed OK!
-//		DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) & 0xcfffffff));
-
 		/* calculate inverse scaling factors used by hardware in 20.12 format */
 		iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width);
 		iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height);
@@ -426,7 +422,8 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v)
 		/* end synchronous reset if display should be enabled */
 		SEQW(RESET, 0x03);
 
-		if (si->ps.tmds2_active)
+		//'safe mode' test! feedback needed with this 'setting'!
+		if (0)//si->ps.tmds2_active)
 		{
 			/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
 			 * internal transmitters... */
@@ -446,7 +443,8 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v)
 	{
 		SEQW(CLKMODE, (temp | 0x20));
 
-		if (si->ps.tmds2_active)
+		//'safe mode' test! feedback needed with this 'setting'!
+		if (0)//si->ps.tmds2_active)
 		{
 			/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
 			 * internal transmitters... */
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac.c b/src/add-ons/accelerants/nvidia/engine/nv_dac.c
index f2b836055b..f2b7e1b655 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_dac.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_dac.c
@@ -12,7 +12,7 @@ static status_t nv4_nv10_nv20_dac_pix_pll_find(
 static status_t g100_g400max_dac_sys_pll_find(
 	float req_sclk,float * calc_sclk,uint8 * m_result,uint8 * n_result,uint8 * p_result);
 
-/* see if an analog VGA monitor is connected to DAC */
+/* see if an analog VGA monitor is connected to connector #1 */
 bool nv_dac_crt_connected(void)
 {
 	uint32 output, dac;
@@ -43,12 +43,12 @@ bool nv_dac_crt_connected(void)
 	if (DACR(TSTCTRL) & 0x10000000)
 	{
 		present = true;
-		LOG(4,("DAC: CRT detected\n"));
+		LOG(4,("DAC: CRT detected on connector #1\n"));
 	}
 	else
 	{
 		present = false;
-		LOG(4,("DAC: no CRT detected\n"));
+		LOG(4,("DAC: no CRT detected on connector #1\n"));
 	}
 
 	/* kill test signal routing */
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c
index 09b5a48456..9ccd337dd1 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c
@@ -10,14 +10,16 @@
 static status_t nv10_nv20_dac2_pix_pll_find(
 	display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test);
 
-/* see if an analog VGA monitor is connected to DAC */
+/* see if an analog VGA monitor is connected to connector #2 */
 bool nv_dac2_crt_connected()
 {
 	uint32 output, dac;
 	bool present;
 
 	/* NOTE:
-	 * NV11 can't do this: It will report DAC1 status instead. */
+	 * NV11 can't do this: It will report DAC1 status instead because it HAS no
+	 * actual secondary DAC function. */
+	/* (It DOES have a secondary palette RAM and pixelclock PLL though.) */
 
 	/* save output connector setting */
 	output = DAC2R(OUTPUT);
@@ -46,12 +48,12 @@ bool nv_dac2_crt_connected()
 	if (DAC2R(TSTCTRL) & 0x10000000)
 	{
 		present = true;
-		LOG(4,("DAC2: CRT detected\n"));
+		LOG(4,("DAC2: CRT detected on connector #2\n"));
 	}
 	else
 	{
 		present = false;
-		LOG(4,("DAC2: no CRT detected\n"));
+		LOG(4,("DAC2: no CRT detected on connector #2\n"));
 	}
 
 	/* kill test signal routing
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c
index bcb75f1593..4654677356 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_general.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c
@@ -80,7 +80,7 @@ status_t nv_general_powerup()
 {
 	status_t status;
 
-	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-16 running.\n"));
+	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-17 running.\n"));
 
 	/* preset no laptop */
 	si->ps.laptop = false;
@@ -1028,8 +1028,8 @@ static status_t nv_general_bios_to_powergraphics()
 	if (si->ps.secondary_head)
 	{
 		/* switch overlay engine to CRTC1 */
-		/* bit 17: GPU FP port #2	(confirmed NV25, NV28, confirmed not on NV34),
-		 * bit 16: GPU FP port #1	(confirmed NV25, NV28, confirmed not on NV34),
+		/* bit 17: GPU FP port #1	(confirmed NV25, NV28, confirmed not on NV34),
+		 * bit 16: GPU FP port #2	(confirmed NV25, NV28, NV34),
 		 * bit 12: overlay engine	(all cards),
 		 * bit  9: TVout chip #2	(confirmed on NV18, NV25, NV28),
 		 * bit  8: TVout chip #1	(all cards),