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kernel arm: Quick style cleanup; No functional change

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This commit is contained in:
Alexander von Gluck IV
2012-04-27 12:29:11 -05:00
parent 3245d56441
commit 258d4ef93d
16 changed files with 225 additions and 198 deletions
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src/system/kernel/arch/arm/arch_commpage.cpp
+1 -1
View File
@@ -31,6 +31,6 @@ status_t
arch_commpage_init_post_cpus(void) arch_commpage_init_post_cpus(void)
{ {
#warning ARM:IMPLEMENTME #warning ARM:IMPLEMENTME
return B_OK; return B_OK;
} }
src/system/kernel/arch/arm/arch_cpu.cpp
+12 -6
View File
@@ -100,7 +100,8 @@ void
arch_cpu_sync_icache(void *address, size_t len) arch_cpu_sync_icache(void *address, size_t len)
{ {
uint32 Rd = 0; uint32 Rd = 0;
asm volatile ("mcr p15, 0, %[c7format], c7, c5, 0" : : [c7format] "r" (Rd) ); asm volatile ("mcr p15, 0, %[c7format], c7, c5, 0"
: : [c7format] "r" (Rd) );
} }
@@ -123,7 +124,8 @@ arch_cpu_invalidate_TLB_range(addr_t start, addr_t end)
{ {
int32 num_pages = end / B_PAGE_SIZE - start / B_PAGE_SIZE; int32 num_pages = end / B_PAGE_SIZE - start / B_PAGE_SIZE;
while (num_pages-- >= 0) { while (num_pages-- >= 0) {
asm volatile ("mcr p15, 0, %[c8format], c8, c6, 1" : : [c8format] "r" (start) ); asm volatile ("mcr p15, 0, %[c8format], c8, c6, 1"
: : [c8format] "r" (start) );
start += B_PAGE_SIZE; start += B_PAGE_SIZE;
} }
} }
@@ -132,8 +134,10 @@ arch_cpu_invalidate_TLB_range(addr_t start, addr_t end)
void void
arch_cpu_invalidate_TLB_list(addr_t pages[], int num_pages) arch_cpu_invalidate_TLB_list(addr_t pages[], int num_pages)
{ {
for (int i = 0; i < num_pages; i++) for (int i = 0; i < num_pages; i++) {
asm volatile ("mcr p15, 0, %[c8format], c8, c6, 1" : : [c8format] "r" (pages[i]) ); asm volatile ("mcr p15, 0, %[c8format], c8, c6, 1":
: [c8format] "r" (pages[i]) );
}
} }
@@ -141,7 +145,8 @@ void
arch_cpu_global_TLB_invalidate(void) arch_cpu_global_TLB_invalidate(void)
{ {
uint32 Rd = 0; uint32 Rd = 0;
asm volatile ("mcr p15, 0, %[c8format], c8, c7, 0" : : [c8format] "r" (Rd) ); asm volatile ("mcr p15, 0, %[c8format], c8, c7, 0"
: : [c8format] "r" (Rd) );
} }
@@ -192,7 +197,8 @@ error:
*/ */
ssize_t ssize_t
arch_cpu_user_strlcpy(char *to, const char *from, size_t size, addr_t *faultHandler) arch_cpu_user_strlcpy(char *to, const char *from,
size_t size, addr_t *faultHandler)
{ {
#warning WRITEME #warning WRITEME
/* /*
src/system/kernel/arch/arm/arch_debug.cpp
+2 -1
View File
@@ -27,8 +27,9 @@ struct stack_frame {
#define NUM_PREVIOUS_LOCATIONS 32 #define NUM_PREVIOUS_LOCATIONS 32
extern struct iframe_stack gBootFrameStack; extern struct iframe_stack gBootFrameStack;
/*
/*
static bool static bool
already_visited(uint32 *visited, int32 *_last, int32 *_num, uint32 framePointer) already_visited(uint32 *visited, int32 *_last, int32 *_num, uint32 framePointer)
{ {
src/system/kernel/arch/arm/arch_debug_console.cpp
-1
View File
@@ -100,4 +100,3 @@ arch_debug_console_init_settings(kernel_args *args)
{ {
return B_OK; return B_OK;
} }
src/system/kernel/arch/arm/arch_elf.cpp
+62 -62
View File
@@ -316,78 +316,78 @@ arch_elf_relocate_rela(struct elf_image_info *image,
struct elf_image_info *resolve_image, struct Elf32_Rela *rel, int rel_len) struct elf_image_info *resolve_image, struct Elf32_Rela *rel, int rel_len)
#endif #endif
{ {
int i; int i;
struct Elf32_Sym *sym; struct Elf32_Sym *sym;
int vlErr; int vlErr;
addr_t S = 0; // symbol address addr_t S = 0; // symbol address
addr_t R = 0; // section relative symbol address addr_t R = 0; // section relative symbol address
addr_t G = 0; // GOT address addr_t G = 0; // GOT address
addr_t L = 0; // PLT address addr_t L = 0; // PLT address
#define P ((addr_t)(image->text_region.delta + rel[i].r_offset)) #define P ((addr_t)(image->text_region.delta + rel[i].r_offset))
#define A ((addr_t)rel[i].r_addend) #define A ((addr_t)rel[i].r_addend)
#define B (image->text_region.delta) #define B (image->text_region.delta)
#warning ARM:define T correctly for thumb!!! #warning ARM:define T correctly for thumb!!!
#define T 0 #define T 0
// TODO: Get the GOT address! // TODO: Get the GOT address!
#define REQUIRE_GOT \ #define REQUIRE_GOT \
if (G == 0) { \ if (G == 0) { \
dprintf("arch_elf_relocate_rela(): Failed to get GOT address!\n"); \ dprintf("arch_elf_relocate_rela(): Failed to get GOT address!\n"); \
return B_ERROR; \ return B_ERROR; \
} }
// TODO: Get the PLT address! // TODO: Get the PLT address!
#define REQUIRE_PLT \ #define REQUIRE_PLT \
if (L == 0) { \ if (L == 0) { \
dprintf("arch_elf_relocate_rela(): Failed to get PLT address!\n"); \ dprintf("arch_elf_relocate_rela(): Failed to get PLT address!\n"); \
return B_ERROR; \ return B_ERROR; \
} }
for (i = 0; i * (int)sizeof(struct Elf32_Rela) < rel_len; i++) { for (i = 0; i * (int)sizeof(struct Elf32_Rela) < rel_len; i++) {
#if CHATTY #if CHATTY
dprintf("looking at rel type %d, offset 0x%lx, sym 0x%lx, addend 0x%lx\n", dprintf("looking at rel type %d, offset 0x%lx, "
ELF32_R_TYPE(rel[i].r_info), rel[i].r_offset, ELF32_R_SYM(rel[i].r_info), rel[i].r_addend); "sym 0x%lx, addend 0x%lx\n", ELF32_R_TYPE(rel[i].r_info),
#endif rel[i].r_offset, ELF32_R_SYM(rel[i].r_info), rel[i].r_addend);
switch (ELF32_R_TYPE(rel[i].r_info)) { #endif
#warning ARM:ADDOTHERREL switch (ELF32_R_TYPE(rel[i].r_info)) {
case R_ARM_GLOB_DAT: #warning ARM:ADDOTHERREL
sym = SYMBOL(image, ELF32_R_SYM(rel[i].r_info));
#ifdef _BOOT_MODE
vlErr = boot_elf_resolve_symbol(image, sym, &S);
#else
vlErr = elf_resolve_symbol(image, sym, resolve_image, &S);
#endif
if (vlErr < 0) {
dprintf("%s(): Failed to relocate "
"entry index %d, rel type %d, offset 0x%lx, sym 0x%lx, "
"addend 0x%lx\n", __FUNCTION__, i, ELF32_R_TYPE(rel[i].r_info),
rel[i].r_offset, ELF32_R_SYM(rel[i].r_info),
rel[i].r_addend);
return vlErr;
}
break;
}
#warning ARM:ADDOTHERREL
switch (ELF32_R_TYPE(rel[i].r_info)) {
case R_ARM_GLOB_DAT: case R_ARM_GLOB_DAT:
write_32(P,(S + A) | T); sym = SYMBOL(image, ELF32_R_SYM(rel[i].r_info));
#ifdef _BOOT_MODE
vlErr = boot_elf_resolve_symbol(image, sym, &S);
#else
vlErr = elf_resolve_symbol(image, sym, resolve_image, &S);
#endif
if (vlErr < 0) {
dprintf("%s(): Failed to relocate "
"entry index %d, rel type %d, offset 0x%lx, sym 0x%lx, "
"addend 0x%lx\n", __FUNCTION__, i,
ELF32_R_TYPE(rel[i].r_info), rel[i].r_offset,
ELF32_R_SYM(rel[i].r_info), rel[i].r_addend);
return vlErr;
}
break;
}
#warning ARM:ADDOTHERREL
switch (ELF32_R_TYPE(rel[i].r_info)) {
case R_ARM_GLOB_DAT:
write_32(P, (S + A) | T);
break; break;
case R_ARM_NONE: case R_ARM_NONE:
break; break;
default: default:
dprintf("arch_elf_relocate_rela(): unhandled " dprintf("arch_elf_relocate_rela(): unhandled "
"relocation type %d!\n", "relocation type %d!\n", ELF32_R_TYPE(rel[i].r_info));
ELF32_R_TYPE(rel[i].r_info)); return B_ERROR;
return B_ERROR;
} }
} }
#warning ARM: FIXME!!!!!!!
#warning ARM: FIXME!!!!!!!
return B_NO_ERROR; return B_NO_ERROR;
} }
src/system/kernel/arch/arm/arch_int.cpp
+23 -21
View File
@@ -29,8 +29,6 @@
#include <vm/VMAddressSpace.h> #include <vm/VMAddressSpace.h>
#include <string.h> #include <string.h>
#warning M68K: writeme!
//#define TRACE_ARCH_INT //#define TRACE_ARCH_INT
#ifdef TRACE_ARCH_INT #ifdef TRACE_ARCH_INT
@@ -70,7 +68,7 @@ struct iframe_stack gBootFrameStack;
void void
arch_int_enable_io_interrupt(int irq) arch_int_enable_io_interrupt(int irq)
{ {
#warning ARM WRITEME #warning ARM WRITEME
//if (!sPIC) //if (!sPIC)
// return; // return;
@@ -83,7 +81,7 @@ arch_int_enable_io_interrupt(int irq)
void void
arch_int_disable_io_interrupt(int irq) arch_int_disable_io_interrupt(int irq)
{ {
#warning ARM WRITEME #warning ARM WRITEME
//if (!sPIC) //if (!sPIC)
// return; // return;
@@ -99,35 +97,41 @@ arch_int_disable_io_interrupt(int irq)
static void static void
print_iframe(struct iframe *frame) print_iframe(struct iframe *frame)
{ {
/* #if 0
dprintf("r0-r3: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r0, frame->r1, frame->r2, frame->r3); dprintf("r0-r3: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r0, frame->r1,
dprintf("r4-r7: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r4, frame->r5, frame->r6, frame->r7); frame->r2, frame->r3);
dprintf("r8-r11: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r8, frame->r9, frame->r10, frame->r11); dprintf("r4-r7: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r4, frame->r5,
dprintf("r12-r15: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r12, frame->r13, frame->a6, frame->a7); frame->r6, frame->r7);
dprintf("r8-r11: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r8, frame->r9,
frame->r10, frame->r11);
dprintf("r12-r15: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r12, frame->r13,
frame->a6, frame->a7);
dprintf(" pc 0x%08lx sr 0x%08lx\n", frame->pc, frame->sr); dprintf(" pc 0x%08lx sr 0x%08lx\n", frame->pc, frame->sr);
*/ #endif
#warning ARM WRITEME #warning ARM WRITEME
} }
status_t status_t
arch_int_init(kernel_args *args) arch_int_init(kernel_args *args)
{ {
#if 0
status_t err; status_t err;
addr_t vbr; addr_t vbr;
int i; int i;
// gExceptionVectors = (m68k_exception_handler *)args->arch_args.vir_vbr; gExceptionVectors = (m68k_exception_handler *)args->arch_args.vir_vbr;
/* fill in the vector table */ /* fill in the vector table */
// for (i = 0; i < M68K_EXCEPTION_VECTOR_COUNT; i++) for (i = 0; i < M68K_EXCEPTION_VECTOR_COUNT; i++)
// gExceptionVectors[i] = &__m68k_exception_common; gExceptionVectors[i] = &__m68k_exception_common;
// vbr = args->arch_args.phys_vbr; vbr = args->arch_args.phys_vbr;
/* point VBR to the new table */ /* point VBR to the new table */
// asm volatile ("movec %0,%%vbr" : : "r"(vbr):); asm volatile ("movec %0,%%vbr" : : "r"(vbr):);
#warning ARM WRITEME #endif
#warning ARM WRITEME
return B_OK; return B_OK;
} }
@@ -137,8 +141,8 @@ status_t
arch_int_init_post_vm(kernel_args *args) arch_int_init_post_vm(kernel_args *args)
{ {
status_t err; status_t err;
// err = M68KPlatform::Default()->InitPIC(args); // err = M68KPlatform::Default()->InitPIC(args);
#warning ARM WRITEME #warning ARM WRITEME
return err; return err;
} }
@@ -159,5 +163,3 @@ arch_int_init_post_device_manager(struct kernel_args *args)
return B_ENTRY_NOT_FOUND; return B_ENTRY_NOT_FOUND;
} }
src/system/kernel/arch/arm/arch_platform.cpp
+9 -7
View File
@@ -17,7 +17,8 @@
#include <real_time_clock.h> #include <real_time_clock.h>
#include <util/kernel_cpp.h> #include <util/kernel_cpp.h>
/*
#if 0
static M68KPlatform *sM68KPlatform; static M68KPlatform *sM68KPlatform;
@@ -25,15 +26,17 @@ static M68KPlatform *sM68KPlatform;
M68KPlatform::M68KPlatform(platform_type platformType, M68KPlatform::M68KPlatform(platform_type platformType,
m68k_platform_type m68kPlatformType) m68k_platform_type m68kPlatformType)
: fPlatformType(platformType), : fPlatformType(platformType),
fM68KPlatformType(m68kPlatformType) fM68KPlatformType(m68kPlatformType)
{ {
} }
// destructor // destructor
M68KPlatform::~M68KPlatform() M68KPlatform::~M68KPlatform()
{ {
} }
// Default // Default
M68KPlatform * M68KPlatform *
M68KPlatform::Default() M68KPlatform::Default()
@@ -43,13 +46,12 @@ M68KPlatform::Default()
// # pragma mark - // # pragma mark -
*/ #endif
status_t status_t
arch_platform_init(struct kernel_args *kernelArgs) arch_platform_init(struct kernel_args *kernelArgs)
{ {
#warning ARM:WRITEME #warning ARM:WRITEME
return B_OK; return B_OK;
} }
@@ -57,9 +59,9 @@ arch_platform_init(struct kernel_args *kernelArgs)
status_t status_t
arch_platform_init_post_vm(struct kernel_args *kernelArgs) arch_platform_init_post_vm(struct kernel_args *kernelArgs)
{ {
#warning ARM:WRITEME
//sM68KPlatform->InitPostVM(kernelArgs);
return B_OK; return B_OK;
#warning ARM:WRITEME
//sM68KPlatform->InitPostVM(kernelArgs);
} }
src/system/kernel/arch/arm/arch_real_time_clock.cpp
+2
View File
@@ -7,12 +7,14 @@
* Distributed under the terms of the MIT License. * Distributed under the terms of the MIT License.
*/ */
#include <arch/real_time_clock.h> #include <arch/real_time_clock.h>
#include <real_time_clock.h> #include <real_time_clock.h>
#include <real_time_data.h> #include <real_time_data.h>
#include <smp.h> #include <smp.h>
status_t status_t
arch_rtc_init(kernel_args *args, struct real_time_data *data) arch_rtc_init(kernel_args *args, struct real_time_data *data)
{ {
src/system/kernel/arch/arm/arch_smp.cpp
-1
View File
@@ -43,4 +43,3 @@ arch_smp_send_broadcast_ici()
{ {
panic("called arch_smp_send_broadcast_ici\n"); panic("called arch_smp_send_broadcast_ici\n");
} }
src/system/kernel/arch/arm/arch_system_info.cpp
+1
View File
@@ -9,6 +9,7 @@
* All rights reserved. Distributed under the terms of the MIT License. * All rights reserved. Distributed under the terms of the MIT License.
*/ */
#include <OS.h> #include <OS.h>
#include <arch_cpu.h> #include <arch_cpu.h>
src/system/kernel/arch/arm/arch_thread.cpp
+11 -10
View File
@@ -27,7 +27,7 @@
#include <string.h> #include <string.h>
#warning M68K: writeme!
// Valid initial arch_thread state. We just memcpy() it when initializing // Valid initial arch_thread state. We just memcpy() it when initializing
// a new thread structure. // a new thread structure.
static struct arch_thread sInitialState; static struct arch_thread sInitialState;
@@ -82,17 +82,20 @@ arch_thread_init_tls(Thread *thread)
void void
arch_thread_context_switch(Thread *from, Thread *to) arch_thread_context_switch(Thread *from, Thread *to)
{ {
/* addr_t newPageDirectory; #if 0
addr_t newPageDirectory;
newPageDirectory = (addr_t)m68k_next_page_directory(from, to); newPageDirectory = (addr_t)m68k_next_page_directory(from, to);
if ((newPageDirectory % B_PAGE_SIZE) != 0) if ((newPageDirectory % B_PAGE_SIZE) != 0)
panic("arch_thread_context_switch: bad pgdir 0x%lx\n", newPageDirectory); panic("arch_thread_context_switch: bad pgdir 0x%lx\n",
#warning M68K: export from arch_vm.c newPageDirectory);
#warning M68K: export from arch_vm.c
m68k_set_pgdir(newPageDirectory); m68k_set_pgdir(newPageDirectory);
m68k_context_switch(&from->arch_info.sp, to->arch_info.sp);*/ m68k_context_switch(&from->arch_info.sp, to->arch_info.sp);
#warning ARM:WRITEME #endif
#warning ARM:WRITEME
} }
@@ -106,7 +109,8 @@ arch_thread_dump_info(void *info)
status_t status_t
arch_thread_enter_userspace(Thread *thread, addr_t entry, void *arg1, void *arg2) arch_thread_enter_userspace(Thread *thread, addr_t entry,
void *arg1, void *arg2)
{ {
panic("arch_thread_enter_uspace(): not yet implemented\n"); panic("arch_thread_enter_uspace(): not yet implemented\n");
return B_ERROR; return B_ERROR;
@@ -145,7 +149,6 @@ arch_check_syscall_restart(Thread *thread)
* arch_fork_arg structure to be passed to arch_restore_fork_frame(). * arch_fork_arg structure to be passed to arch_restore_fork_frame().
* Also makes sure to return the right value. * Also makes sure to return the right value.
*/ */
void void
arch_store_fork_frame(struct arch_fork_arg *arg) arch_store_fork_frame(struct arch_fork_arg *arg)
{ {
@@ -159,9 +162,7 @@ arch_store_fork_frame(struct arch_fork_arg *arg)
* This function does not return to the caller, but will enter userland * This function does not return to the caller, but will enter userland
* in the child team at the same position where the parent team left of. * in the child team at the same position where the parent team left of.
*/ */
void void
arch_restore_fork_frame(struct arch_fork_arg *arg) arch_restore_fork_frame(struct arch_fork_arg *arg)
{ {
} }
src/system/kernel/arch/arm/arch_timer.cpp
+6 -8
View File
@@ -22,26 +22,24 @@
void void
arch_timer_set_hardware_timer(bigtime_t timeout) arch_timer_set_hardware_timer(bigtime_t timeout)
{ {
#warning ARM:WRITEME #warning ARM:WRITEME
// M68KPlatform::Default()->SetHardwareTimer(timeout);
// M68KPlatform::Default()->SetHardwareTimer(timeout);
} }
void void
arch_timer_clear_hardware_timer() arch_timer_clear_hardware_timer()
{ {
#warning ARM:WRITEME #warning ARM:WRITEME
// M68KPlatform::Default()->ClearHardwareTimer(); // M68KPlatform::Default()->ClearHardwareTimer();
} }
int int
arch_init_timer(kernel_args *args) arch_init_timer(kernel_args *args)
{ {
#warning ARM:WRITEME #warning ARM:WRITEME
// M68KPlatform::Default()->InitTimer(args);
return 0; return 0;
//M68KPlatform::Default()->InitTimer(args);
} }
src/system/kernel/arch/arm/arch_user_debugger.cpp
+4 -2
View File
@@ -14,6 +14,8 @@
#warning ARM: WRITEME #warning ARM: WRITEME
void void
arch_clear_team_debug_info(struct arch_team_debug_info *info) arch_clear_team_debug_info(struct arch_team_debug_info *info)
{ {
@@ -61,11 +63,10 @@ arch_get_debug_cpu_state(debug_cpu_state *cpuState)
status_t status_t
arch_get_thread_debug_cpu_state(Thread *thread, debug_cpu_state *cpuState) arch_get_thread_debug_cpu_state(Thread *thread, debug_cpu_state *cpuState)
{ {
return B_ERROR; return B_ERROR;
} }
status_t status_t
arch_set_breakpoint(void *address) arch_set_breakpoint(void *address)
{ {
@@ -93,6 +94,7 @@ arch_clear_watchpoint(void *address)
return B_ERROR; return B_ERROR;
} }
bool bool
arch_has_breakpoints(struct arch_team_debug_info *info) arch_has_breakpoints(struct arch_team_debug_info *info)
{ {
src/system/kernel/arch/arm/arch_vm.cpp
+9 -8
View File
@@ -9,6 +9,7 @@
* Distributed under the terms of the NewOS License. * Distributed under the terms of the NewOS License.
*/ */
#include <KernelExport.h> #include <KernelExport.h>
#include <kernel.h> #include <kernel.h>
@@ -27,7 +28,8 @@
# define TRACE(x) ; # define TRACE(x) ;
#endif #endif
#warning M68K: WRITEME #warning ARM: WRITEME
status_t status_t
arch_vm_init(kernel_args *args) arch_vm_init(kernel_args *args)
@@ -39,11 +41,11 @@ arch_vm_init(kernel_args *args)
status_t status_t
arch_vm_init2(kernel_args *args) arch_vm_init2(kernel_args *args)
{ {
// int bats[8]; // int bats[8];
// int i; // int i;
/**/ /**/
#warning M68K: disable TT0 and TT1, set up pmmu #warning ARM: WRITEME
return B_OK; return B_OK;
} }
@@ -59,8 +61,7 @@ arch_vm_init_post_area(kernel_args *args)
status_t status_t
arch_vm_init_end(kernel_args *args) arch_vm_init_end(kernel_args *args)
{ {
#warning ARM: WRITEME
#warning M68K: unset TT0 now
return B_OK; return B_OK;
} }
@@ -75,8 +76,8 @@ arch_vm_init_post_modules(kernel_args *args)
void void
arch_vm_aspace_swap(struct VMAddressSpace *from, struct VMAddressSpace *to) arch_vm_aspace_swap(struct VMAddressSpace *from, struct VMAddressSpace *to)
{ {
#warning ARM:WRITEME #warning ARM:WRITEME
// m68k_set_pgdir(m68k_translation_map_get_pgdir(&to->TranslationMap())); // m68k_set_pgdir(m68k_translation_map_get_pgdir(&to->TranslationMap()));
} }
src/system/kernel/arch/arm/arch_vm_translation_map.cpp
+7 -7
View File
@@ -28,9 +28,9 @@
static union { static union {
uint64 align; uint64 align;
char thirty_two[sizeof(ARMPagingMethod32Bit)]; char thirty_two[sizeof(ARMPagingMethod32Bit)];
#if B_HAIKU_PHYSICAL_BITS == 64 #if B_HAIKU_PHYSICAL_BITS == 64
char pae[sizeof(ARMPagingMethodPAE)]; char pae[sizeof(ARMPagingMethodPAE)];
#endif #endif
} sPagingMethodBuffer; } sPagingMethodBuffer;
@@ -50,7 +50,7 @@ arch_vm_translation_map_init(kernel_args *args,
{ {
TRACE("vm_translation_map_init: entry\n"); TRACE("vm_translation_map_init: entry\n");
#ifdef TRACE_VM_TMAP #ifdef TRACE_VM_TMAP
TRACE("physical memory ranges:\n"); TRACE("physical memory ranges:\n");
for (uint32 i = 0; i < args->num_physical_memory_ranges; i++) { for (uint32 i = 0; i < args->num_physical_memory_ranges; i++) {
phys_addr_t start = args->physical_memory_range[i].start; phys_addr_t start = args->physical_memory_range[i].start;
@@ -73,9 +73,9 @@ arch_vm_translation_map_init(kernel_args *args,
addr_t end = start + args->virtual_allocated_range[i].size; addr_t end = start + args->virtual_allocated_range[i].size;
TRACE(" %#10" B_PRIxADDR " - %#10" B_PRIxADDR "\n", start, end); TRACE(" %#10" B_PRIxADDR " - %#10" B_PRIxADDR "\n", start, end);
} }
#endif #endif
#if B_HAIKU_PHYSICAL_BITS == 64 //IRA: Check all 64 bit code and adjust for ARM #if B_HAIKU_PHYSICAL_BITS == 64 //IRA: Check 64 bit code and adjust for ARM
bool paeAvailable = x86_check_feature(IA32_FEATURE_PAE, FEATURE_COMMON); bool paeAvailable = x86_check_feature(IA32_FEATURE_PAE, FEATURE_COMMON);
bool paeNeeded = false; bool paeNeeded = false;
for (uint32 i = 0; i < args->num_physical_memory_ranges; i++) { for (uint32 i = 0; i < args->num_physical_memory_ranges; i++) {
@@ -95,9 +95,9 @@ arch_vm_translation_map_init(kernel_args *args,
paeNeeded ? "available" : "needed"); paeNeeded ? "available" : "needed");
gARMPagingMethod = new(&sPagingMethodBuffer) ARMPagingMethod32Bit; gARMPagingMethod = new(&sPagingMethodBuffer) ARMPagingMethod32Bit;
} }
#else #else
gARMPagingMethod = new(&sPagingMethodBuffer) ARMPagingMethod32Bit; gARMPagingMethod = new(&sPagingMethodBuffer) ARMPagingMethod32Bit;
#endif #endif
return gARMPagingMethod->Init(args, _physicalPageMapper); return gARMPagingMethod->Init(args, _physicalPageMapper);
} }
src/system/kernel/arch/arm/uart.cpp
+60 -47
View File
@@ -20,72 +20,83 @@
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include <debug.h> #include <debug.h>
#include <arch/arm/reg.h> #include <arch/arm/reg.h>
#include <arch/arm/uart.h> #include <arch/arm/uart.h>
#include <board_config.h> #include <board_config.h>
//#include <target/debugconfig.h> //#include <target/debugconfig.h>
#define DEBUG_UART BOARD_DEBUG_UART #define DEBUG_UART BOARD_DEBUG_UART
struct uart_stat { struct uart_stat {
addr_t base; addr_t base;
uint shift; uint shift;
}; };
static struct uart_stat uart[3] = { static struct uart_stat uart[3] = {
{ BOARD_UART1_BASE, 2 }, { BOARD_UART1_BASE, 2 },
{ BOARD_UART2_BASE, 2 }, { BOARD_UART2_BASE, 2 },
{ BOARD_UART3_BASE, 2 }, { BOARD_UART3_BASE, 2 },
}; };
static inline void write_uart_reg(int port, uint reg, unsigned char data) static inline void write_uart_reg(int port, uint reg, unsigned char data)
{ {
*(volatile unsigned char *)(uart[port].base + (reg << uart[port].shift)) = data; *(volatile unsigned char *)(uart[port].base + (reg << uart[port].shift))
= data;
} }
static inline unsigned char read_uart_reg(int port, uint reg) static inline unsigned char read_uart_reg(int port, uint reg)
{ {
return *(volatile unsigned char *)(uart[port].base + (reg << uart[port].shift)); return *(volatile unsigned char *)(uart[port].base
+ (reg << uart[port].shift));
} }
#define LCR_8N1 0x03 #define LCR_8N1 0x03
#define FCR_FIFO_EN 0x01 /* Fifo enable */ #define FCR_FIFO_EN 0x01 /* Fifo enable */
#define FCR_RXSR 0x02 /* Receiver soft reset */ #define FCR_RXSR 0x02 /* Receiver soft reset */
#define FCR_TXSR 0x04 /* Transmitter soft reset */ #define FCR_TXSR 0x04 /* Transmitter soft reset */
#define MCR_DTR 0x01 #define MCR_DTR 0x01
#define MCR_RTS 0x02 #define MCR_RTS 0x02
#define MCR_DMA_EN 0x04 #define MCR_DMA_EN 0x04
#define MCR_TX_DFR 0x08 #define MCR_TX_DFR 0x08
#define LCR_WLS_MSK 0x03 /* character length select mask */ #define LCR_WLS_MSK 0x03 /* character length select mask */
#define LCR_WLS_5 0x00 /* 5 bit character length */ #define LCR_WLS_5 0x00 /* 5 bit character length */
#define LCR_WLS_6 0x01 /* 6 bit character length */ #define LCR_WLS_6 0x01 /* 6 bit character length */
#define LCR_WLS_7 0x02 /* 7 bit character length */ #define LCR_WLS_7 0x02 /* 7 bit character length */
#define LCR_WLS_8 0x03 /* 8 bit character length */ #define LCR_WLS_8 0x03 /* 8 bit character length */
#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ #define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
#define LCR_PEN 0x08 /* Parity eneble */ #define LCR_PEN 0x08 /* Parity eneble */
#define LCR_EPS 0x10 /* Even Parity Select */ #define LCR_EPS 0x10 /* Even Parity Select */
#define LCR_STKP 0x20 /* Stick Parity */ #define LCR_STKP 0x20 /* Stick Parity */
#define LCR_SBRK 0x40 /* Set Break */ #define LCR_SBRK 0x40 /* Set Break */
#define LCR_BKSE 0x80 /* Bank select enable */ #define LCR_BKSE 0x80 /* Bank select enable */
#define LSR_DR 0x01 /* Data ready */ #define LSR_DR 0x01 /* Data ready */
#define LSR_OE 0x02 /* Overrun */ #define LSR_OE 0x02 /* Overrun */
#define LSR_PE 0x04 /* Parity error */ #define LSR_PE 0x04 /* Parity error */
#define LSR_FE 0x08 /* Framing error */ #define LSR_FE 0x08 /* Framing error */
#define LSR_BI 0x10 /* Break */ #define LSR_BI 0x10 /* Break */
#define LSR_THRE 0x20 /* Xmit holding register empty */ #define LSR_THRE 0x20 /* Xmit holding register empty */
#define LSR_TEMT 0x40 /* Xmitter empty */ #define LSR_TEMT 0x40 /* Xmitter empty */
#define LSR_ERR 0x80 /* Error */ #define LSR_ERR 0x80 /* Error */
#define LCRVAL LCR_8N1 /* 8 data, 1 stop, no parity */ #define LCRVAL LCR_8N1 /* 8 data, 1 stop, no parity */
#define MCRVAL (MCR_DTR | MCR_RTS) /* RTS/DTR */ #define MCRVAL (MCR_DTR | MCR_RTS) /* RTS/DTR */
#define FCRVAL (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR) /* Clear & enable FIFOs */ #define FCRVAL (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR) /* Clear & enable FIFOs */
#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
int uart_debug_port(void) int uart_debug_port(void)
{ {
@@ -111,9 +122,10 @@ void uart_init_port(int port, uint baud)
// write_uart_reg(port, UART_LCR, LCRVAL); // operational mode // write_uart_reg(port, UART_LCR, LCRVAL); // operational mode
} }
void uart_init_early(void) void uart_init_early(void)
{ {
#if BOARD_CPU_OMAP3 #if BOARD_CPU_OMAP3
/* UART1 */ /* UART1 */
RMWREG32(CM_FCLKEN1_CORE, 13, 1, 1); RMWREG32(CM_FCLKEN1_CORE, 13, 1, 1);
RMWREG32(CM_ICLKEN1_CORE, 13, 1, 1); RMWREG32(CM_ICLKEN1_CORE, 13, 1, 1);
@@ -125,32 +137,33 @@ void uart_init_early(void)
/* UART3 */ /* UART3 */
RMWREG32(CM_FCLKEN_PER, 11, 1, 1); RMWREG32(CM_FCLKEN_PER, 11, 1, 1);
RMWREG32(CM_ICLKEN_PER, 11, 1, 1); RMWREG32(CM_ICLKEN_PER, 11, 1, 1);
#else #else
#warning INTITIALIZE UART!!!!! #warning INTITIALIZE UART!!!!!
#endif #endif
uart_init_port(DEBUG_UART, 115200); uart_init_port(DEBUG_UART, 115200);
} }
void uart_init(void) void uart_init(void)
{ {
} }
int uart_putc(int port, char c ) int uart_putc(int port, char c )
{ {
while (!(read_uart_reg(port, UART_LSR) & (1<<6)));
while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the last char to get out // wait for the last char to get out
; write_uart_reg(port, UART_THR, c);
write_uart_reg(port, UART_THR, c);
return 0; return 0;
} }
int uart_getc(int port, bool wait) /* returns -1 if no data available */ int uart_getc(int port, bool wait) /* returns -1 if no data available */
{ {
if (wait) { if (wait) {
while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo while (!(read_uart_reg(port, UART_LSR) & (1<<0)));
; // wait for data to show up in the rx fifo
} else { } else {
if (!(read_uart_reg(port, UART_LSR) & (1<<0))) if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
return -1; return -1;
@@ -158,12 +171,14 @@ int uart_getc(int port, bool wait) /* returns -1 if no data available */
return read_uart_reg(port, UART_RHR); return read_uart_reg(port, UART_RHR);
} }
void uart_flush_tx(int port) void uart_flush_tx(int port)
{ {
while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the last char to get out while (!(read_uart_reg(port, UART_LSR) & (1<<6)));
; // wait for the last char to get out
} }
void uart_flush_rx(int port) void uart_flush_rx(int port)
{ {
// empty the rx fifo // empty the rx fifo
@@ -172,5 +187,3 @@ void uart_flush_rx(int port)
(void)c; (void)c;
} }
} }