* turns out r800 has different register locations :(

* remove device_type and replace with device_chipset
* change MEMSIZE to >> 10 as r600-r700 store this in bytes (r800 uses MB and will be fixed soon)
* add if statement to select what register locations to use based on chipset
** Maybe use a struct or something to store these in a standardized way?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41525 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-05-16 04:03:18 +00:00
parent 8ba4ac51f5
commit 2be925fd04
5 changed files with 88 additions and 62 deletions
+1 -37
View File
@@ -24,11 +24,6 @@
#define VENDOR_ID_ATI 0x1002
// TODO : Remove masks as they don't apply to radeon
#define RADEON_TYPE_FAMILY_MASK 0xf000
#define RADEON_TYPE_GROUP_MASK 0xfff0
#define RADEON_TYPE_MODEL_MASK 0xffff
#define RADEON_R600 0x0600
#define RADEON_R700 0x0700
#define RADEON_R800 0x0800
@@ -43,37 +38,6 @@
#define MODES_BOOT_INFO "vesa_modes/v1"
struct DeviceType {
uint32 type;
DeviceType(int t)
{
type = t;
}
DeviceType& operator=(int t)
{
type = t;
return *this;
}
bool InFamily(uint32 family) const
{
return (type & RADEON_TYPE_FAMILY_MASK) == family;
}
bool InGroup(uint32 group) const
{
return (type & RADEON_TYPE_GROUP_MASK) == group;
}
bool IsModel(uint32 model) const
{
return (type & RADEON_TYPE_MODEL_MASK) == model;
}
};
// info about PLL on graphics card
struct pll_info {
uint32 reference_frequency;
@@ -141,7 +105,7 @@ struct radeon_shared_info {
uint16 cursor_hot_x;
uint16 cursor_hot_y;
DeviceType device_type;
uint32 device_chipset;
char device_identifier[32];
struct pll_info pll_info;
};