diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
index 03ce5b1a36..193fc13f8d 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
@@ -106,17 +106,18 @@ status_t nv_crtc_set_timing(display_mode target)
 	LOG(4,("CRTC: setting timing\n"));
 
 	/* setup tuned internal modeline for flatpanel if connected and active */
+	/* notes:
+	 * - the CRTC modeline must end earlier than the panel modeline to keep correct
+	 *   sync going;
+	 * - if the CRTC modeline ends too soon, pixelnoise will occur in 8 (or so) pixel
+	 *   wide horizontal stripes. This can be observed earliest on fullscreen overlay,
+	 *   and if it gets worse, also normal desktop output will suffer. The stripes
+	 *   are mainly visible at the left of the screen, over the entire screen height. */
 	if (si->ps.tmds1_active)
 	{
 		LOG(2,("CRTC: DFP active: tuning modeline\n"));
 
 		/* horizontal timing */
-		//testing (640x480): total = 135% is too much, 120% to small...
-		//total = display + 160 equals panel modeline: but must be smaller...?
-//		target.timing.h_total = target.timing.h_display + 152;//160;//128
-//		target.timing.h_sync_start = target.timing.h_total - 136;//144;//112
-//		target.timing.h_sync_end = target.timing.h_total - 40;//48;//16
-		//adaptive to panel: fixme: test on 4:3 and 16:10 panels!
 		target.timing.h_sync_start =
 			((uint16)((si->ps.p1_timing.h_sync_start / ((float)si->ps.p1_timing.h_display)) *
 			target.timing.h_display)) & 0xfff8;
@@ -129,11 +130,11 @@ status_t nv_crtc_set_timing(display_mode target)
 			(((uint16)((si->ps.p1_timing.h_total / ((float)si->ps.p1_timing.h_display)) *
 			target.timing.h_display)) & 0xfff8) - 8;
 
-		/* apparantly NV11 timing is a bit more critical */
+		/* NV11 timing has tighter constraints than later cards */
 		if ((si->ps.card_type == NV11) &&
 			(target.timing.h_display == si->ps.p1_timing.h_display))
 		{
-			target.timing.h_total -= 32;
+			target.timing.h_total -= 56;
 		}
 
 		if (target.timing.h_sync_start == target.timing.h_display)
@@ -142,9 +143,6 @@ status_t nv_crtc_set_timing(display_mode target)
 			target.timing.h_sync_end -= 8;
 
 		/* vertical timing */
-//		target.timing.v_total = target.timing.v_display + 6;
-//		target.timing.v_sync_start = target.timing.v_total - 3;
-//		target.timing.v_sync_end = target.timing.v_total - 2;
 		target.timing.v_sync_start =
 			((uint16)((si->ps.p1_timing.v_sync_start / ((float)si->ps.p1_timing.v_display)) *
 			target.timing.v_display));
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
index 6454242dbe..ec7099d75a 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
@@ -92,17 +92,18 @@ status_t nv_crtc2_set_timing(display_mode target)
 	LOG(4,("CRTC2: setting timing\n"));
 
 	/* setup tuned internal modeline for flatpanel if connected and active */
+	/* notes:
+	 * - the CRTC modeline must end earlier than the panel modeline to keep correct
+	 *   sync going;
+	 * - if the CRTC modeline ends too soon, pixelnoise will occur in 8 (or so) pixel
+	 *   wide horizontal stripes. This can be observed earliest on fullscreen overlay,
+	 *   and if it gets worse, also normal desktop output will suffer. The stripes
+	 *   are mainly visible at the left of the screen, over the entire screen height. */
 	if (si->ps.tmds2_active)
 	{
 		LOG(2,("CRTC2: DFP active: tuning modeline\n"));
 
 		/* horizontal timing */
-		//testing (640x480): total = 135% is too much, 120% to small...
-		//total = display + 160 equals panel modeline: but must be smaller...?
-//		target.timing.h_total = target.timing.h_display + 152;//160;//128
-//		target.timing.h_sync_start = target.timing.h_total - 136;//144;//112
-//		target.timing.h_sync_end = target.timing.h_total - 40;//48;//16
-		//adaptive to panel: fixme: test on 4:3 and 16:10 panels!
 		target.timing.h_sync_start =
 			((uint16)((si->ps.p2_timing.h_sync_start / ((float)si->ps.p2_timing.h_display)) *
 			target.timing.h_display)) & 0xfff8;
@@ -115,11 +116,11 @@ status_t nv_crtc2_set_timing(display_mode target)
 			(((uint16)((si->ps.p2_timing.h_total / ((float)si->ps.p2_timing.h_display)) *
 			target.timing.h_display)) & 0xfff8) - 8;
 
-		/* apparantly NV11 timing is a bit more critical */
+		/* NV11 timing has tighter constraints than later cards */
 		if ((si->ps.card_type == NV11) &&
 			(target.timing.h_display == si->ps.p2_timing.h_display))
 		{
-			target.timing.h_total -= 32;
+			target.timing.h_total -= 56;
 		}
 
 		if (target.timing.h_sync_start == target.timing.h_display)
@@ -128,9 +129,6 @@ status_t nv_crtc2_set_timing(display_mode target)
 			target.timing.h_sync_end -= 8;
 
 		/* vertical timing */
-//		target.timing.v_total = target.timing.v_display + 6;
-//		target.timing.v_sync_start = target.timing.v_total - 3;
-//		target.timing.v_sync_end = target.timing.v_total - 2;
 		target.timing.v_sync_start =
 			((uint16)((si->ps.p2_timing.v_sync_start / ((float)si->ps.p2_timing.v_display)) *
 			target.timing.v_display));
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c
index 98a1da6704..9a6d9bd6c1 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_general.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c
@@ -80,7 +80,7 @@ status_t nv_general_powerup()
 {
 	status_t status;
 
-	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-26 running.\n"));
+	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-27 running.\n"));
 
 	/* preset no laptop */
 	si->ps.laptop = false;
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c
index baf764e7d7..36dd00690f 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_info.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c
@@ -513,6 +513,7 @@ static void detect_panels()
 
 	/* dump some panel configuration registers... */
 	LOG(2,("INFO: Dumping flatpanel registers:\n"));
+	LOG(2,("DUALHEAD_CTRL: $%08x\n", NV_REG32(NV32_DUALHEAD_CTRL)));
 	LOG(2,("DAC1: FP_HDISPEND: %d\n", DACR(FP_HDISPEND)));
 	LOG(2,("DAC1: FP_HTOTAL: %d\n", DACR(FP_HTOTAL)));
 	LOG(2,("DAC1: FP_HCRTC: %d\n", DACR(FP_HCRTC)));
@@ -538,6 +539,7 @@ static void detect_panels()
 	LOG(2,("DAC1: FP_DEBUG3: $%08x\n", DACR(FP_DEBUG3)));
 
 	LOG(2,("DAC1: FUNCSEL: $%08x\n", NV_REG32(NV32_FUNCSEL)));
+	LOG(2,("DAC1: PANEL_PWR: $%08x\n", NV_REG32(NV32_PANEL_PWR)));
 
 	if(si->ps.secondary_head)
 	{
@@ -566,6 +568,7 @@ static void detect_panels()
 		LOG(2,("DAC2: FP_DEBUG3: $%08x\n", DAC2R(FP_DEBUG3)));
 
 		LOG(2,("DAC2: FUNCSEL: $%08x\n", NV_REG32(NV32_2FUNCSEL)));
+		LOG(2,("DAC2: PANEL_PWR: $%08x\n", NV_REG32(NV32_2PANEL_PWR)));
 	}
 	LOG(2,("INFO: End flatpanel registers dump.\n"));
 }