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cleanup variable naming for port count

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This commit is contained in:
Marcus Overhagen
2012-09-14 18:58:58 +02:00
parent a63b046e90
commit 2f0f9d8780
2 changed files with 15 additions and 19 deletions
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src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp
+14 -17
View File
@@ -25,8 +25,7 @@ AHCIController::AHCIController(device_node *node,
fPCIDeviceID(0xffff), fPCIDeviceID(0xffff),
fFlags(0), fFlags(0),
fCommandSlotCount(0), fCommandSlotCount(0),
fPortCountMax(0), fPortCount(0),
fPortCountAvail(0),
fPortImplementedMask(0), fPortImplementedMask(0),
fIRQ(0), fIRQ(0),
fInstanceCheck(-1) fInstanceCheck(-1)
@@ -132,29 +131,27 @@ AHCIController::Init()
} }
fCommandSlotCount = 1 + ((fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK); fCommandSlotCount = 1 + ((fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK);
fPortCountMax = 1 + ((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK); fPortCount = 1 + ((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
fPortImplementedMask = fRegs->pi; fPortImplementedMask = fRegs->pi;
// reported mask of implemented ports is sometimes empty // reported mask of implemented ports is sometimes empty
if (fPortImplementedMask == 0) { if (fPortImplementedMask == 0) {
fPortImplementedMask = 0xffffffff >> (32 - fPortCountMax); fPortImplementedMask = 0xffffffff >> (32 - fPortCount);
TRACE("ports-implemented mask is zero, using 0x%" B_PRIx32 " instead.\n", TRACE("ports-implemented mask is zero, using 0x%" B_PRIx32 " instead.\n",
fPortImplementedMask); fPortImplementedMask);
} }
// reported number of ports is sometimes too small // reported number of ports is sometimes too small
int maxPortIndex; int highestPort;
maxPortIndex = fls(fPortImplementedMask); highestPort = fls(fPortImplementedMask); // 1-based, 1 to 32
if (fPortCountMax < maxPortIndex) { if (fPortCount < highestPort) {
TRACE("reported number of ports is wrong, using %d instead.\n", maxPortIndex); TRACE("reported number of ports is wrong, using %d instead.\n", highestPort);
fPortCountMax = maxPortIndex; fPortCount = highestPort;
} }
fPortCountAvail = count_bits_set(fPortImplementedMask);
TRACE("cap: Interface Speed Support: generation %" B_PRIu32 "\n", (fRegs->cap >> CAP_ISS_SHIFT) & CAP_ISS_MASK); TRACE("cap: Interface Speed Support: generation %" B_PRIu32 "\n", (fRegs->cap >> CAP_ISS_SHIFT) & CAP_ISS_MASK);
TRACE("cap: Number of Command Slots: %d (raw %#" B_PRIx32 ")\n", fCommandSlotCount, (fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK); TRACE("cap: Number of Command Slots: %d (raw %#" B_PRIx32 ")\n", fCommandSlotCount, (fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK);
TRACE("cap: Number of Ports: %d (raw %#" B_PRIx32 ")\n", fPortCountMax, (fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK); TRACE("cap: Number of Ports: %d (raw %#" B_PRIx32 ")\n", fPortCount, (fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
TRACE("cap: Supports Port Multiplier: %s\n", (fRegs->cap & CAP_SPM) ? "yes" : "no"); TRACE("cap: Supports Port Multiplier: %s\n", (fRegs->cap & CAP_SPM) ? "yes" : "no");
TRACE("cap: Supports External SATA: %s\n", (fRegs->cap & CAP_SXS) ? "yes" : "no"); TRACE("cap: Supports External SATA: %s\n", (fRegs->cap & CAP_SXS) ? "yes" : "no");
TRACE("cap: Enclosure Management Supported: %s\n", (fRegs->cap & CAP_EMS) ? "yes" : "no"); TRACE("cap: Enclosure Management Supported: %s\n", (fRegs->cap & CAP_EMS) ? "yes" : "no");
@@ -172,7 +169,7 @@ AHCIController::Init()
TRACE("cap: Supports AHCI mode only: %s\n", (fRegs->cap & CAP_SAM) ? "yes" : "no"); TRACE("cap: Supports AHCI mode only: %s\n", (fRegs->cap & CAP_SAM) ? "yes" : "no");
TRACE("ghc: AHCI Enable: %s\n", (fRegs->ghc & GHC_AE) ? "yes" : "no"); TRACE("ghc: AHCI Enable: %s\n", (fRegs->ghc & GHC_AE) ? "yes" : "no");
TRACE("Ports Implemented Mask: %#08" B_PRIx32 "\n", fPortImplementedMask); TRACE("Ports Implemented Mask: %#08" B_PRIx32 "\n", fPortImplementedMask);
TRACE("Number of Available Ports: %d\n", fPortCountAvail); TRACE("Number of Available Ports: %d\n", count_bits_set(fPortImplementedMask));
TRACE("AHCI Version %" B_PRIu32 ".%" B_PRIu32 "\n", fRegs->vs >> 16, fRegs->vs & 0xff); TRACE("AHCI Version %" B_PRIu32 ".%" B_PRIu32 "\n", fRegs->vs >> 16, fRegs->vs & 0xff);
TRACE("Interrupt %u\n", fIRQ); TRACE("Interrupt %u\n", fIRQ);
@@ -182,7 +179,7 @@ AHCIController::Init()
goto err; goto err;
} }
for (int i = 0; i < fPortCountMax; i++) { for (int i = 0; i < fPortCount; i++) {
if (fPortImplementedMask & (1 << i)) { if (fPortImplementedMask & (1 << i)) {
fPort[i] = new (std::nothrow)AHCIPort(this, i); fPort[i] = new (std::nothrow)AHCIPort(this, i);
if (!fPort[i]) { if (!fPort[i]) {
@@ -208,7 +205,7 @@ AHCIController::Init()
fRegs->ghc |= GHC_IE; fRegs->ghc |= GHC_IE;
FlushPostedWrites(); FlushPostedWrites();
for (int i = 0; i < fPortCountMax; i++) { for (int i = 0; i < fPortCount; i++) {
if (fPort[i]) { if (fPort[i]) {
status_t status = fPort[i]->Init2(); status_t status = fPort[i]->Init2();
if (status < B_OK) { if (status < B_OK) {
@@ -234,7 +231,7 @@ AHCIController::Uninit()
{ {
TRACE("AHCIController::Uninit\n"); TRACE("AHCIController::Uninit\n");
for (int i = 0; i < fPortCountMax; i++) { for (int i = 0; i < fPortCount; i++) {
if (fPort[i]) { if (fPort[i]) {
fPort[i]->Uninit(); fPort[i]->Uninit();
delete fPort[i]; delete fPort[i];
@@ -307,7 +304,7 @@ AHCIController::Interrupt(void *data)
if (interruptPending == 0) if (interruptPending == 0)
return B_UNHANDLED_INTERRUPT; return B_UNHANDLED_INTERRUPT;
for (int i = 0; i < self->fPortCountMax; i++) { for (int i = 0; i < self->fPortCount; i++) {
if (interruptPending & (1 << i)) { if (interruptPending & (1 << i)) {
if (self->fPort[i]) { if (self->fPort[i]) {
self->fPort[i]->Interrupt(); self->fPort[i]->Interrupt();
src/add-ons/kernel/busses/scsi/ahci/ahci_controller.h
+1 -2
View File
@@ -49,8 +49,7 @@ private:
volatile ahci_hba * fRegs; volatile ahci_hba * fRegs;
area_id fRegsArea; area_id fRegsArea;
int fCommandSlotCount; int fCommandSlotCount;
int fPortCountMax; int fPortCount;
int fPortCountAvail;
uint32 fPortImplementedMask; uint32 fPortImplementedMask;
uint8 fIRQ; uint8 fIRQ;
AHCIPort * fPort[32]; AHCIPort * fPort[32];