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Cleanup.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16879 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2006-03-26 16:40:38 +00:00
parent c14a34a65f
commit 2fd8de2415
2 changed files with 0 additions and 66 deletions
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src/add-ons/accelerants/intel_extreme/mode.cpp
-26
View File
@@ -281,32 +281,6 @@ intel_set_display_mode(display_mode *mode)
| (((postDivisor - 2) << DISPLAY_PLL_POST_DIVISOR_SHIFT) & DISPLAY_PLL_POST_DIVISOR_MASK) | (((postDivisor - 2) << DISPLAY_PLL_POST_DIVISOR_SHIFT) & DISPLAY_PLL_POST_DIVISOR_MASK)
| (divisorRegister == INTEL_DISPLAY_PLL_DIVISOR_1 ? DISPLAY_PLL_DIVISOR_1 : 0)); | (divisorRegister == INTEL_DISPLAY_PLL_DIVISOR_1 ? DISPLAY_PLL_DIVISOR_1 : 0));
TRACE(("pll regs: %08lx, 0: %08lx, 1: %08lx\n", read32(INTEL_DISPLAY_PLL),
read32(INTEL_DISPLAY_PLL_DIVISOR_0), read32(INTEL_DISPLAY_PLL_DIVISOR_1)));
uint32 divisor = read32(divisorRegister);
TRACE((" POST %ld\n",
(read32(INTEL_DISPLAY_PLL) & DISPLAY_PLL_POST_DIVISOR_MASK) >> DISPLAY_PLL_POST_DIVISOR_SHIFT));
TRACE((" 0: N %ld, M1 %ld, M2 %ld\n",
(divisor & DISPLAY_PLL_N_DIVISOR_MASK) >> DISPLAY_PLL_N_DIVISOR_SHIFT,
(divisor & DISPLAY_PLL_M1_DIVISOR_MASK) >> DISPLAY_PLL_M1_DIVISOR_SHIFT,
(divisor & DISPLAY_PLL_M2_DIVISOR_MASK) >> DISPLAY_PLL_M2_DIVISOR_SHIFT));
divisor = read32(INTEL_DISPLAY_PLL_DIVISOR_1);
TRACE((" 1: N %ld, M1 %ld, M2 %ld\n",
(divisor & DISPLAY_PLL_N_DIVISOR_MASK) >> DISPLAY_PLL_N_DIVISOR_SHIFT,
(divisor & DISPLAY_PLL_M1_DIVISOR_MASK) >> DISPLAY_PLL_M1_DIVISOR_SHIFT,
(divisor & DISPLAY_PLL_M2_DIVISOR_MASK) >> DISPLAY_PLL_M2_DIVISOR_SHIFT));
uint32 n = ((divisor & DISPLAY_PLL_N_DIVISOR_MASK) >> DISPLAY_PLL_N_DIVISOR_SHIFT) + 2;
uint32 m1 = ((divisor & DISPLAY_PLL_M1_DIVISOR_MASK) >> DISPLAY_PLL_M1_DIVISOR_SHIFT) + 2;
uint32 m2 = ((divisor & DISPLAY_PLL_M2_DIVISOR_MASK) >> DISPLAY_PLL_M2_DIVISOR_SHIFT) + 2;
uint32 p = ((read32(INTEL_DISPLAY_PLL) & DISPLAY_PLL_POST_DIVISOR_MASK) >> DISPLAY_PLL_POST_DIVISOR_SHIFT) + 2;
//uint32 p2 = (read32(INTEL_DISPLAY_PLL) & DISPLAY_PLL_DIVIDE_4X) ? 2 : 1;
float clock = ((gInfo->shared_info->pll_info.reference_frequency / 1000.0f * (5*m1 + m2)) / n) / (p * 4);
TRACE((" n = %lu, m1 = %lu, m2 = %lu, p = %lu\n", n, m1, m2, p));
TRACE((" Clock frequency: %g MHz\n", clock));
TRACE((" h_total %ld, v_total %ld, refresh: %g\n", current.timing.h_total, current.timing.v_total,
clock * 1000000.0f / (current.timing.h_total * current.timing.v_total)));
write32(INTEL_DISPLAY_CONTROL, (read32(INTEL_DISPLAY_CONTROL) write32(INTEL_DISPLAY_CONTROL, (read32(INTEL_DISPLAY_CONTROL)
& ~DISPLAY_CONTROL_COLOR_MASK) | colorMode); & ~DISPLAY_CONTROL_COLOR_MASK) | colorMode);
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
-40
View File
@@ -70,35 +70,6 @@ PhysicalMemoryMapper::Keep()
// #pragma mark - // #pragma mark -
#if 0
#define DUMPED_BLOCK_SIZE 16
void
dumpBlock(int file, const uint8 *buffer, int size)
{
int i;
for (i = 0; i < size;) {
int start = i;
char line[512];
int pos = sprintf(line, "%06x: ", start);
for (; i < start+DUMPED_BLOCK_SIZE; i++) {
if (!(i % 4))
pos += sprintf(line + pos, sizeof(line) - pos, " ");
if (i >= size)
break;
pos += snprintf(line + pos, sizeof(line) - pos, "%02x",
*(buffer + i));
}
pos += snprintf(line + pos, sizeof(line) - pos, "\n");
write(file, line, pos);
}
}
#endif
status_t status_t
intel_extreme_init(intel_info &info) intel_extreme_init(intel_info &info)
@@ -152,17 +123,6 @@ intel_extreme_init(intel_info &info)
return info.registers_area; return info.registers_area;
} }
#if 0
// dump registers to a file
int file = open("/boot/home/intel_extreme_registers", O_CREAT | O_TRUNC | O_WRONLY, 0666);
if (file >= 0) {
dumpBlock(file, info.registers, info.pci->u.h0.base_register_sizes[1]);
close(file);
sync();
} else
dprintf("intel_extreme: could not log (%s)!!\n", strerror(errno));
#endif
// no errors, so keep mappings // no errors, so keep mappings
fbMapper.Keep(); fbMapper.Keep();
mmioMapper.Keep(); mmioMapper.Keep();