From 36ad4411a87a4487c144eb85725ee5d28f352da4 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 17 Feb 2005 11:39:07 +0000 Subject: [PATCH] added some comments about NV40 architecture. We have several new unknown factors: - DAC2 always detects a analog screen connected; - it seems like there are at least two new registers we don't know about. One extra switch to place output on connectors, and one (extra) switch for pixelclock PLL to CRTC connections (one PLL drives both CRTC's in some cases, pre-programmed by the card BIOS determined on the screen configuration found at power-up. - in a known register (TSTCTRL) b20 blocks/moves output on connectors (?). All confirmed on NV43, GeForce PCIe 6600GT. Driver status: - one DVI monitor connected is OK; - one analog screen connected on the DB15 connector is OK, - two analog screens connected is OK and can be used for dualhead. other combinations don't work well or at all. This is the status confirmed on the NV43. Assuming same for other cards of NV40 architecture. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11399 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/nvidia/engine/nv_acc_dma.c | 4 ---- .../accelerants/nvidia/engine/nv_dac2.c | 1 + .../accelerants/nvidia/engine/nv_general.c | 4 ++++ .../accelerants/nvidia/engine/nv_info.c | 20 ++++++++++++++++++- 4 files changed, 24 insertions(+), 5 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index 867a8f9744..4055420ec9 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -468,10 +468,6 @@ status_t nv_acc_init_dma() ACCW(NV44_WHAT2, 0x00000000); ACCW(NV44_WHAT3, 0x00000000); -//schakelt screrm signaal uit op NV43, maar timing blijft werken<<<<<<<< -// pNv->PRAMDAC[0x0608/4] |= 0x00100000;//0x00680608==NVDAC_TSTCTRL haiku - //b20=1=DACTM_TEST ON (termination?) - //how about: NVDAC2_TSTCTRL???? break; default: ACCW(NV40P_WHAT0, 0x83280eff); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c index cd6f457df1..7e0f0e5a23 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c @@ -11,6 +11,7 @@ static status_t nv10_nv20_dac2_pix_pll_find( display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test); /* see if an analog VGA monitor is connected to connector #2 */ +//fixme if possible: on NV40 arch (confirmed NV43) this routine always find a monitor! bool nv_dac2_crt_connected() { uint32 output, dac; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index edcd785501..1e6bc8c868 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -1251,6 +1251,10 @@ static status_t nv_general_bios_to_powergraphics() /* turn on DAC and make sure detection testsignal routing is disabled * (b16 = disable DAC, * b12 = enable testsignal output */ + //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output + //(confirmed NV43), while it's timing remains operational (black screen). + //It feels like in some screen configurations it can move the output to the other + //output connector as well... DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); /* turn on DAC2 if it exists * (NOTE: testsignal function block resides in DAC1 only (!)) */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index 4c6ac9e821..51c8ca26b6 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -1,7 +1,7 @@ /* Read initialisation information from card */ /* some bits are hacks, where PINS is not known */ /* Author: - Rudolf Cornelissen 7/2003-1/2005 + Rudolf Cornelissen 7/2003-2/2005 */ #define MODULE_BIT 0x00002000 @@ -2493,6 +2493,24 @@ static void setup_output_matrix() LOG(2,("INFO: head 2 has an analog panel or CRT:\n")); LOG(2,("INFO: defaulting to head 1 for primary use.\n")); break; + case 0x32: /* more than two monitors connected to just two outputs: illegal! */ + //general fixme: + //NV40 architecture contains (an) additional switch(es) to + //connect a CRTC/DAC combination to a connector. We can't work as + //usual (yet) because this interferes via BIOS card pre-programming. + // + //Also: it looks as if each pixelclock PLL can select different CRTC's + //as well now via a new register: one PLL can be driving both CRTC's + //and there's nothing we can do about that (yet). (DVI/dualhead trouble) + if (si->ps.card_arch < NV40A) + { + LOG(2,("INFO: illegal monitor setup ($%02x):\n", si->ps.monitors)); + /* head 2 takes precedence because it has a digital panel while + * head 1 has not. */ + LOG(2,("INFO: defaulting to head 2 for primary use.\n")); + si->ps.crtc2_prim = true; + break; + } default: /* more than two monitors connected to just two outputs: illegal! */ LOG(2,("INFO: illegal monitor setup ($%02x):\n", si->ps.monitors)); LOG(2,("INFO: defaulting to head 1 for primary use.\n"));