diff --git a/headers/private/kernel/arch/x86/smp_apic.h b/headers/private/kernel/arch/x86/smp_apic.h index 5c1366d94c..1cd070e3ef 100644 --- a/headers/private/kernel/arch/x86/smp_apic.h +++ b/headers/private/kernel/arch/x86/smp_apic.h @@ -8,11 +8,6 @@ #define MP_FLT_SIGNATURE '_PM_' #define MP_CTH_SIGNATURE 'PCMP' -#define APIC_DM_INIT (5 << 8) -#define APIC_DM_STARTUP (6 << 8) -#define APIC_LEVEL_TRIG (1 << 14) -#define APIC_ASSERT (1 << 13) - #define APIC_ENABLE 0x100 #define APIC_FOCUS (~(1 << 9)) #define APIC_SIV (0xff) @@ -35,21 +30,29 @@ #define APIC_CCRT 0x390 #define APIC_TDCR 0x3e0 -#define APIC_ICR1_WRITE_MASK 0xfff3f000 -#define APIC_ICR1_DELMODE_FIXED 0 -#define APIC_ICR1_DELMODE_LOWESTPRI (1 << 8) -#define APIC_ICR1_DESTMODE_LOG (1 << 11) -#define APIC_ICR1_DESTMODE_PHYS 0 +/* ICR defines */ +#define APIC_ICR1_WRITE_MASK 0xfff3f000 +#define APIC_ICR1_READ_MASK 0xfff32000 +#define APIC_ICR2_MASK 0x00ffffff -#define APIC_ICR1_READ_MASK 0xfff32000 -#define APIC_ICR1_DELSTATUS (1 << 12) +#define APIC_ICR1_DELIVERY_MODE_FIXED 0 +#define APIC_ICR1_DELIVERY_MODE_LOWESTPRI (1 << 8) +#define APIC_ICR1_DELIVERY_MODE_INIT (5 << 8) +#define APIC_ICR1_DELIVERY_MODE_STARTUP (6 << 8) -#define APIC_ICR1_DEST_FIELD (0) -#define APIC_ICR1_DEST_SELF (1 << 18) -#define APIC_ICR1_DEST_ALL (2 << 18) -#define APIC_ICR1_DEST_ALL_BUT_SELF (3 << 18) +#define APIC_ICR1_DEST_MODE_PHYSICAL 0 +#define APIC_ICR1_DEST_MODE_LOGICAL (1 << 11) -#define APIC_ICR2_MASK 0x00ffffff +#define APIC_ICR1_ASSERT (1 << 13) +#define APIC_ICR1_TRIGGER_MODE_LEVEL (1 << 14) +#define APIC_ICR1_DELIVERY_STATUS (1 << 12) + +#define APIC_ICR1_DEST_FIELD 0 +#define APIC_ICR1_DEST_SELF (1 << 18) +#define APIC_ICR1_DEST_ALL (2 << 18) +#define APIC_ICR1_DEST_ALL_BUT_SELF (3 << 18) + +/* other defines */ #define APIC_TDCR_2 0x00 #define APIC_TDCR_4 0x01 diff --git a/src/system/boot/platform/bios_ia32/smp_boot.c b/src/system/boot/platform/bios_ia32/smp_boot.c index 35478cdb90..432e12b239 100644 --- a/src/system/boot/platform/bios_ia32/smp_boot.c +++ b/src/system/boot/platform/bios_ia32/smp_boot.c @@ -340,8 +340,8 @@ calculate_apic_timer_conversion_factor(void) void smp_boot_other_cpus(void) { - uint32 trampoline_code; - uint32 trampoline_stack; + uint32 trampolineCode; + uint32 trampolineStack; uint32 i; if (gKernelArgs.num_cpus < 2) @@ -354,44 +354,41 @@ smp_boot_other_cpus(void) // allocate a stack and a code area for the smp trampoline // (these have to be < 1M physical) - trampoline_code = 0x9f000; // 640kB - 4096 == 0x9f000 - trampoline_stack = 0x9e000; // 640kB - 8192 == 0x9e000 + trampolineCode = 0x9f000; // 640kB - 4096 == 0x9f000 + trampolineStack = 0x9e000; // 640kB - 8192 == 0x9e000 // copy the trampoline code over - memcpy((char *)trampoline_code, &smp_trampoline, + memcpy((char *)trampolineCode, &smp_trampoline, (uint32)&smp_trampoline_end - (uint32)&smp_trampoline); // boot the cpus for (i = 1; i < gKernelArgs.num_cpus; i++) { - uint32 *final_stack; - uint32 *final_stack_ptr; - uint32 *tramp_stack_ptr; + uint32 *finalStack; + uint32 *tempStack; uint32 config; - uint32 num_startups; + uint32 numStartups; uint32 j; // set this stack up - final_stack = (uint32 *)gKernelArgs.cpu_kstack[i].start; - memset(final_stack, 0, KERNEL_STACK_SIZE); - final_stack_ptr = (final_stack + KERNEL_STACK_SIZE / sizeof(uint32)) - 1; - *final_stack_ptr = (uint32)&smp_cpu_ready; - final_stack_ptr--; + finalStack = (uint32 *)gKernelArgs.cpu_kstack[i].start; + memset(finalStack, 0, KERNEL_STACK_SIZE); + tempStack = (finalStack + KERNEL_STACK_SIZE / sizeof(uint32)) - 1; + *tempStack = (uint32)&smp_cpu_ready; // set the trampoline stack up - tramp_stack_ptr = (uint32 *)(trampoline_stack + B_PAGE_SIZE - 4); + tempStack = (uint32 *)(trampolineStack + B_PAGE_SIZE - 4); // final location of the stack - *tramp_stack_ptr = ((uint32)final_stack) + KERNEL_STACK_SIZE - sizeof(uint32); - tramp_stack_ptr--; + *tempStack = ((uint32)finalStack) + KERNEL_STACK_SIZE - sizeof(uint32); + tempStack--; // page dir - *tramp_stack_ptr = gKernelArgs.arch_args.phys_pgdir; - tramp_stack_ptr--; + *tempStack = gKernelArgs.arch_args.phys_pgdir; // put a gdt descriptor at the bottom of the stack - *((uint16 *)trampoline_stack) = 0x18 - 1; // LIMIT - *((uint32 *)(trampoline_stack + 2)) = trampoline_stack + 8; + *((uint16 *)trampolineStack) = 0x18 - 1; // LIMIT + *((uint32 *)(trampolineStack + 2)) = trampolineStack + 8; // put the gdt at the bottom - memcpy(&((uint32 *)trampoline_stack)[2], (void *)gKernelArgs.arch_args.vir_gdt, 6*4); + memcpy(&((uint32 *)trampolineStack)[2], (void *)gKernelArgs.arch_args.vir_gdt, 6*4); /* clear apic errors */ if (gKernelArgs.arch_args.cpu_apic_version[i] & 0xf0) { @@ -400,47 +397,52 @@ smp_boot_other_cpus(void) } /* send (aka assert) INIT IPI */ - config = (apic_read(APIC_ICR2) & 0x00ffffff) | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); + config = (apic_read(APIC_ICR2) & APIC_ICR2_MASK) + | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); apic_write(APIC_ICR2, config); /* set target pe */ - config = (apic_read(APIC_ICR1) & 0xfff00000) | 0x0000c500; + config = (apic_read(APIC_ICR1) & 0xfff00000) | APIC_ICR1_TRIGGER_MODE_LEVEL + | APIC_ICR1_ASSERT | APIC_ICR1_DELIVERY_MODE_INIT; apic_write(APIC_ICR1, config); // wait for pending to end - while ((apic_read(APIC_ICR1) & 0x00001000) == 0x00001000) + while ((apic_read(APIC_ICR1) & APIC_ICR1_DELIVERY_STATUS) != 0) ; /* deassert INIT */ - config = (apic_read(APIC_ICR2) & 0x00ffffff) | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); + config = (apic_read(APIC_ICR2) & APIC_ICR2_MASK) + | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); apic_write(APIC_ICR2, config); - config = (apic_read(APIC_ICR1) & 0xfff00000) | 0x00008500; + config = (apic_read(APIC_ICR1) & 0xfff00000) | APIC_ICR1_TRIGGER_MODE_LEVEL + | APIC_ICR1_DELIVERY_MODE_INIT; apic_write(APIC_ICR1, config); // wait for pending to end - while ((apic_read(APIC_ICR1) & 0x00001000) == 0x00001000) + while ((apic_read(APIC_ICR1) & APIC_ICR1_DELIVERY_STATUS) != 0) ; /* wait 10ms */ spin(10000); /* is this a local apic or an 82489dx ? */ - num_startups = (gKernelArgs.arch_args.cpu_apic_version[i] & 0xf0) ? 2 : 0; - for (j = 0; j < num_startups; j++) { + numStartups = (gKernelArgs.arch_args.cpu_apic_version[i] & 0xf0) ? 2 : 0; + for (j = 0; j < numStartups; j++) { /* it's a local apic, so send STARTUP IPIs */ apic_write(APIC_ESR, 0); /* set target pe */ - config = (apic_read(APIC_ICR2) & 0xf0ffffff) | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); + config = (apic_read(APIC_ICR2) & APIC_ICR2_MASK) + | (gKernelArgs.arch_args.cpu_apic_id[i] << 24); apic_write(APIC_ICR2, config); /* send the IPI */ - config = (apic_read(APIC_ICR1) & 0xfff0f800) | APIC_DM_STARTUP | - (0x9f000 >> 12); + config = (apic_read(APIC_ICR1) & 0xfff0f800) | APIC_ICR1_DELIVERY_MODE_STARTUP + | (trampolineCode >> 12); apic_write(APIC_ICR1, config); /* wait */ spin(200); - while ((apic_read(APIC_ICR1)& 0x00001000) == 0x00001000) + while ((apic_read(APIC_ICR1) & APIC_ICR1_DELIVERY_STATUS) != 0) ; } } diff --git a/src/system/kernel/arch/x86/arch_smp.c b/src/system/kernel/arch/x86/arch_smp.c index 65b4668f1a..273e7037cf 100644 --- a/src/system/kernel/arch/x86/arch_smp.c +++ b/src/system/kernel/arch/x86/arch_smp.c @@ -199,7 +199,8 @@ arch_smp_send_broadcast_ici(void) cpu_status state = disable_interrupts(); config = apic_read(APIC_ICR1) & APIC_ICR1_WRITE_MASK; - apic_write(APIC_ICR1, config | 0xfd | APIC_ICR1_DELMODE_FIXED | APIC_ICR1_DESTMODE_PHYS | APIC_ICR1_DEST_ALL_BUT_SELF); + apic_write(APIC_ICR1, config | 0xfd | APIC_ICR1_DELIVERY_MODE_FIXED + | APIC_ICR1_DEST_MODE_PHYSICAL | APIC_ICR1_DEST_ALL_BUT_SELF); restore_interrupts(state); } @@ -215,7 +216,8 @@ arch_smp_send_ici(int32 target_cpu) apic_write(APIC_ICR2, config | cpu_apic_id[target_cpu] << 24); config = apic_read(APIC_ICR1) & APIC_ICR1_WRITE_MASK; - apic_write(APIC_ICR1, config | 0xfd | APIC_ICR1_DELMODE_FIXED | APIC_ICR1_DESTMODE_PHYS | APIC_ICR1_DEST_FIELD); + apic_write(APIC_ICR1, config | 0xfd | APIC_ICR1_DELIVERY_MODE_FIXED + | APIC_ICR1_DEST_MODE_PHYSICAL | APIC_ICR1_DEST_FIELD); restore_interrupts(state); }