diff --git a/src/add-ons/accelerants/radeon_hd/display.cpp b/src/add-ons/accelerants/radeon_hd/display.cpp
index 172ac8d156..932bf34139 100644
--- a/src/add-ons/accelerants/radeon_hd/display.cpp
+++ b/src/add-ons/accelerants/radeon_hd/display.cpp
@@ -611,15 +611,15 @@ display_dce45_crtc_load_lut(uint8 crtcID)
 
 	if (info.dceMajor >= 5) {
 		Write32(OUT, NI_INPUT_CSC_CONTROL + regs->crtcOffset,
-			(NI_INPUT_CSC_GRPH_MODE(NI_INPUT_CSC_BYPASS)
-				| NI_INPUT_CSC_OVL_MODE(NI_INPUT_CSC_BYPASS)));
+			NI_INPUT_CSC_GRPH_MODE(NI_INPUT_CSC_BYPASS)
+				| NI_INPUT_CSC_OVL_MODE(NI_INPUT_CSC_BYPASS));
 		Write32(OUT, NI_PRESCALE_GRPH_CONTROL + regs->crtcOffset,
 			NI_GRPH_PRESCALE_BYPASS);
 		Write32(OUT, NI_PRESCALE_OVL_CONTROL + regs->crtcOffset,
 			NI_OVL_PRESCALE_BYPASS);
 		Write32(OUT, NI_INPUT_GAMMA_CONTROL + regs->crtcOffset,
-			(NI_GRPH_INPUT_GAMMA_MODE(NI_INPUT_GAMMA_USE_LUT) |
-			NI_OVL_INPUT_GAMMA_MODE(NI_INPUT_GAMMA_USE_LUT)));
+			NI_GRPH_INPUT_GAMMA_MODE(NI_INPUT_GAMMA_USE_LUT) |
+			NI_OVL_INPUT_GAMMA_MODE(NI_INPUT_GAMMA_USE_LUT));
 	}
 
 	Write32(OUT, EVERGREEN_DC_LUT_CONTROL + regs->crtcOffset, 0);