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intel_extreme: for DDI, map the ddc pin to the GPIO

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add port G for Gen12

Change-Id: I70bba2d6d2ec0fbad8bdbec14412ea982690d563
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5626
Reviewed-by: Adrien Destugues <[email protected]>
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
This commit is contained in:
Jérôme Duval
2024-01-31 18:32:58 +00:00
committed by Adrien Destugues
parent dbc23cdfb7
commit 4a6a465c80
4 changed files with 117 additions and 14 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+15 -1
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@@ -249,7 +249,8 @@ enum port_index {
INTEL_PORT_C,
INTEL_PORT_D,
INTEL_PORT_E,
INTEL_PORT_F
INTEL_PORT_F,
INTEL_PORT_G
};
enum pch_info {
@@ -1042,6 +1043,7 @@ struct intel_brightness_legacy {
#define DDI_BUF_CTL_D (0x4300 | REGS_NORTH_PIPE_AND_PORT)
#define DDI_BUF_CTL_E (0x4400 | REGS_NORTH_PIPE_AND_PORT)
#define DDI_BUF_CTL_F (0x4500 | REGS_NORTH_PIPE_AND_PORT)
#define DDI_BUF_CTL_G (0x4600 | REGS_NORTH_PIPE_AND_PORT)
#define DDI_BUF_CTL_ENABLE (1 << 31)
#define DDI_BUF_TRANS_SELECT(n) ((n) << 24)
#define DDI_BUF_EMP_MASK (0xf << 24)
@@ -1055,16 +1057,22 @@ struct intel_brightness_legacy {
#define PIPE_DDI_FUNC_CTL_B (0x1400 | REGS_NORTH_PIPE_AND_PORT)
#define PIPE_DDI_FUNC_CTL_C (0x2400 | REGS_NORTH_PIPE_AND_PORT)
#define PIPE_DDI_FUNC_CTL_EDP (0xF400 | REGS_NORTH_PIPE_AND_PORT)
#define PIPE_DDI_FUNC_CTL_DSI0 (0xB400 | REGS_NORTH_PIPE_AND_PORT)
#define PIPE_DDI_FUNC_CTL_DSI1 (0xBC00 | REGS_NORTH_PIPE_AND_PORT)
#define PIPE_DDI_FUNC_CTL_ENABLE (1 << 31)
#define PIPE_DDI_SELECT_SHIFT 28
#define TGL_PIPE_DDI_SELECT_SHIFT 27
#define PIPE_DDI_SELECT_PORT(x) ((x) << PIPE_DDI_SELECT_SHIFT)
#define TGL_PIPE_DDI_SELECT_PORT(x) ((x) << TGL_PIPE_DDI_SELECT_SHIFT)
#define PIPE_DDI_SELECT_MASK (7 << PIPE_DDI_SELECT_SHIFT)
#define TGL_PIPE_DDI_SELECT_MASK (7 << TGL_PIPE_DDI_SELECT_SHIFT)
#define PIPE_DDI_PORT_NONE 0
#define PIPE_DDI_PORT_B 1
#define PIPE_DDI_PORT_C 2
#define PIPE_DDI_PORT_D 3
#define PIPE_DDI_PORT_E 4
#define PIPE_DDI_PORT_F 5
#define PIPE_DDI_PORT_G 6
#define PIPE_DDI_MODESEL_SHIFT 24
#define PIPE_DDI_MODESEL_MODE(x) ((x) << PIPE_DDI_MODESEL_SHIFT)
#define PIPE_DDI_MODESEL_MASK (7 << PIPE_DDI_MODESEL_SHIFT)
@@ -1313,6 +1321,12 @@ struct intel_brightness_legacy {
#define INTEL_I2C_IO_F (0x5024 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_G (0x5028 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_H (0x502c | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_I (0x5030 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_J (0x5034 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_K (0x5038 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_L (0x503c | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_M (0x5040 | REGS_SOUTH_SHARED)
#define INTEL_I2C_IO_N (0x5044 | REGS_SOUTH_SHARED)
// i2c hardware controller
#define INTEL_GMBUS0 (0x5100 | REGS_SOUTH_SHARED)
#define INTEL_GMBUS4 (0x5110 | REGS_SOUTH_SHARED)