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intel_extreme: Sandy/IvyBridge fix 4 lanes DP detect, fully pgm eDP link

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Rudolf Cornelissen
2022-02-04 19:56:27 +01:00
parent a18ff64517
commit 4b5e0c3bcd
5 changed files with 70 additions and 18 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+5 -1
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@@ -861,7 +861,11 @@ struct intel_free_graphics_memory {
#define INTEL_DISP_PORT_WIDTH_MASK (7 << INTEL_DISP_PORT_WIDTH_SHIFT)
#define INTEL_DISP_PORT_WIDTH_1 0
#define INTEL_DISP_PORT_WIDTH_2 1
#define INTEL_DISP_PORT_WIDTH_4 2
#define INTEL_DISP_PORT_WIDTH_4 3
#define INTEL_DISP_EDP_PLL_FREQ_SHIFT 16
#define INTEL_DISP_EDP_PLL_FREQ_MASK (3 << INTEL_DISP_EDP_PLL_FREQ_SHIFT)
#define INTEL_DISP_EDP_PLL_FREQ_270 0
#define INTEL_DISP_EDP_PLL_FREQ_162 1
#define INTEL_TRANSCODER_A_DP_CTL (0x0300 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_TRANSCODER_B_DP_CTL (0x1300 | REGS_SOUTH_TRANSCODER_PORT)