From 4cb53e7f3a589c949c953762ec9dfc2f9e904f6c Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 17 Nov 2005 16:31:53 +0000 Subject: [PATCH] updating DMA acc engine init code: part 4. Still in progress, but maybe NV47 acc runs now: It's enabled now. This turns out to be an interesting update: init code has been extended for NV20 and higher cards, giving me reason enough to probably do some more 3D testing on newer cards. (probably for nothing though :) git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14999 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/nvidia/engine/nv_acc_dma.c | 62 ++++++++++++++++--- .../accelerants/nvidia/engine/nv_general.c | 6 +- 2 files changed, 55 insertions(+), 13 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index 3969227a34..d1133a933c 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -216,6 +216,7 @@ status_t nv_acc_init_dma() ACCW(NV41_FBTILBED, (si->ps.memory_size - 1)); if (si->ps.card_type == NV47) + /* or ID == 0x01dx or ID == 0x029x: but no cards defined yet */ { ACCW(NV47_FBTILCAD, 0); ACCW(NV47_FBTILDAD, 0); @@ -808,12 +809,57 @@ status_t nv_acc_init_dma() } /* NV20A, NV30A and NV40A: */ - /* copy tile setup stuff from 'source' to acc engine (pattern colorRAM?) */ - for (cnt = 0; cnt < 32; cnt++) + /* copy tile setup stuff from previous setup 'source' to acc engine + * (pattern colorRAM?) */ + if ((si->ps.card_type <= NV40) || (si->ps.card_type == NV45)) { - NV_REG32(NVACC_NV20_WHAT0 + (cnt << 2)) = - NV_REG32(NVACC_NV10_FBTIL0AD + (cnt << 2)); + for (cnt = 0; cnt < 32; cnt++) + { + /* copy NV10_FBTIL0AD upto/including NV10_FBTIL7ST */ + NV_REG32(NVACC_NV20_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV10_FBTIL0AD + (cnt << 2)); + + /* copy NV10_FBTIL0AD upto/including NV10_FBTIL7ST */ + NV_REG32(NVACC_NV20_2_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV10_FBTIL0AD + (cnt << 2)); + } } + else + { + /* NV41, 43, 44, 47 */ + if (si->ps.card_type == NV47) + /* or ID == 0x01dx or ID == 0x029x: but no cards defined yet */ + { + for (cnt = 0; cnt < 60; cnt++) + { + /* copy NV41_FBTIL0AD upto/including NV47_FBTILEST */ + NV_REG32(NVACC_NV41_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); + + /* copy NV41_FBTIL0AD upto/including NV47_FBTILEST */ + NV_REG32(NVACC_NV20_2_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); + } + } + else + { + /* NV41, 43, 44 */ + for (cnt = 0; cnt < 48; cnt++) + { + /* copy NV41_FBTIL0AD upto/including NV41_FBTILBST */ + NV_REG32(NVACC_NV20_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); + + if (si->ps.card_type != NV44) + { + /* copy NV41_FBTIL0AD upto/including NV41_FBTILBST */ + NV_REG32(NVACC_NV20_2_WHAT0 + (cnt << 2)) = + NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); + } + } + } + } +//fixme: still check rest down: if (si->ps.card_arch >= NV40A) { @@ -822,8 +868,8 @@ status_t nv_acc_init_dma() /* copy some RAM configuration info(?) */ ACCW(NV20_WHAT_T0, NV_REG32(NV32_PFB_CONFIG_0)); ACCW(NV20_WHAT_T1, NV_REG32(NV32_PFB_CONFIG_1)); - ACCW(NV40_WHAT_T2, NV_REG32(NV32_PFB_CONFIG_0)); - ACCW(NV40_WHAT_T3, NV_REG32(NV32_PFB_CONFIG_1)); + ACCW(NV40_WHAT_T2, NV_REG32(NV32_PFB_CONFIG_0));//updated? + ACCW(NV40_WHAT_T3, NV_REG32(NV32_PFB_CONFIG_1));//updated? /* setup location of active screen in framebuffer */ ACCW(NV20_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); @@ -837,8 +883,8 @@ status_t nv_acc_init_dma() /* copy some RAM configuration info(?) */ ACCW(NV40P_WHAT_T0, NV_REG32(NV32_PFB_CONFIG_0)); ACCW(NV40P_WHAT_T1, NV_REG32(NV32_PFB_CONFIG_1)); - ACCW(NV40P_WHAT_T2, NV_REG32(NV32_PFB_CONFIG_0)); - ACCW(NV40P_WHAT_T3, NV_REG32(NV32_PFB_CONFIG_1)); + ACCW(NV40P_WHAT_T2, NV_REG32(NV32_PFB_CONFIG_0));//updated? + ACCW(NV40P_WHAT_T3, NV_REG32(NV32_PFB_CONFIG_1));//updated? /* setup location of active screen in framebuffer */ ACCW(NV40P_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index d3a2d62694..987d44daba 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -91,7 +91,7 @@ status_t nv_general_powerup() { status_t status; - LOG(1,("POWERUP: Haiku nVidia Accelerant 0.63 running.\n")); + LOG(1,("POWERUP: Haiku nVidia Accelerant 0.64 running.\n")); /* log VBLANK INT usability status */ if (si->ps.int_assigned) @@ -1627,8 +1627,6 @@ status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_r { /* check if we can setup this mode with acceleration */ *acc_mode = true; -//temporary disabling ACC on NV47: -if (si->ps.card_type == NV47) *acc_mode = false; /* virtual_width */ if (target->virtual_width > max_acc_width) *acc_mode = false; /* virtual_height */ @@ -1661,8 +1659,6 @@ if (si->ps.card_type == NV47) *acc_mode = false; { /* check if we can setup this mode with acceleration */ *acc_mode = true; -//temporary disabling ACC on NV47: -if (si->ps.card_type == NV47) *acc_mode = false; /* (we already know virtual_width will be no problem) */ /* virtual_height */ /* (NV cards can even do more than this(?)...