changed pci to gPci, plus some clean
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22309 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -32,7 +32,7 @@ status_t fwohci_pci_detach(int index);
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pci_info *pciInfo[MAX_CARDS];
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pci_info *pciInfo[MAX_CARDS];
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fwohci_softc_t *gFwohci_softc[MAX_CARDS];
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fwohci_softc_t *gFwohci_softc[MAX_CARDS];
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struct firewire_softc *gFirewire_softc[MAX_CARDS];
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struct firewire_softc *gFirewire_softc[MAX_CARDS];
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pci_module_info *pci;
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pci_module_info *gPci;
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dpc_module_info *gDpc;
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dpc_module_info *gDpc;
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struct supported_device{
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struct supported_device{
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@@ -74,7 +74,8 @@ struct supported_device supported_devices[] = {
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};
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};
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static int find_device_name(pci_info *info)
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static int
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find_device_name(pci_info *info)
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{
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{
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struct supported_device *device;
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struct supported_device *device;
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for (device = supported_devices; device->name; device++) {
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for (device = supported_devices; device->name; device++) {
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@@ -148,7 +149,7 @@ fw_module_init(void)
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if (!info)
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if (!info)
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return B_NO_MEMORY;
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return B_NO_MEMORY;
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if ((status = get_module(B_PCI_MODULE_NAME,(module_info **)&pci)) != B_OK) {
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if ((status = get_module(B_PCI_MODULE_NAME,(module_info **)&gPci)) != B_OK) {
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TRACE("pci module unavailable\n");
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TRACE("pci module unavailable\n");
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free(info);
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free(info);
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return status;
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return status;
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@@ -164,7 +165,7 @@ fw_module_init(void)
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memset(gFwohci_softc, 0, sizeof(gFwohci_softc));
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memset(gFwohci_softc, 0, sizeof(gFwohci_softc));
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// find devices
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// find devices
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for (i = 0, found = 0; (status = pci->get_nth_pci_info(i, info)) == B_OK; i++) {
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for (i = 0, found = 0; (status = gPci->get_nth_pci_info(i, info)) == B_OK; i++) {
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if (find_device_name(info)
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if (find_device_name(info)
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|| ((info->class_base == PCI_serial_bus)
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|| ((info->class_base == PCI_serial_bus)
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&& (info->class_sub == PCI_firewire)
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&& (info->class_sub == PCI_firewire)
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@@ -203,9 +204,6 @@ fw_module_init(void)
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TRACE("found %d cards\n", found);
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TRACE("found %d cards\n", found);
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free(info);
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free(info);
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// if (!found)
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// goto err_found;
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if ((status = initialize_timer()) != B_OK) {
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if ((status = initialize_timer()) != B_OK) {
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ERROR("timer init failed\n");
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ERROR("timer init failed\n");
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goto err_timer;
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goto err_timer;
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@@ -222,7 +220,6 @@ fw_module_init(void)
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err_pci:
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err_pci:
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terminate_timer();
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terminate_timer();
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err_timer:
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err_timer:
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err_found:
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err_outofmem:
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err_outofmem:
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for (i = 0; i < found; i++) {
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for (i = 0; i < found; i++) {
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free(gFirewire_softc[i]);
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free(gFirewire_softc[i]);
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@@ -61,7 +61,7 @@
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#define PCIM_CMD_BUSMASTEREN 0x0004
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#define PCIM_CMD_BUSMASTEREN 0x0004
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#define PCIM_CMD_MWRICEN 0x0010
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#define PCIM_CMD_MWRICEN 0x0010
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#define PCIM_CMD_IOS 0x0001
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#define PCIM_CMD_IOS 0x0001
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extern pci_module_info *pci;
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extern pci_module_info *gPci;
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extern pci_info *pciInfo[MAX_CARDS];
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extern pci_info *pciInfo[MAX_CARDS];
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extern fwohci_softc_t *gFwohci_softc[MAX_CARDS];
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extern fwohci_softc_t *gFwohci_softc[MAX_CARDS];
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extern struct firewire_softc *gFirewire_softc[MAX_CARDS];
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extern struct firewire_softc *gFirewire_softc[MAX_CARDS];
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@@ -143,14 +143,14 @@ fwohci_pci_attach(int index)
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mtx_init(FW_GMTX(&sc->fc), "firewire", NULL, MTX_DEF);
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mtx_init(FW_GMTX(&sc->fc), "firewire", NULL, MTX_DEF);
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val = pci->read_pci_config(info->bus, info->device, info->function,
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val = gPci->read_pci_config(info->bus, info->device, info->function,
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PCI_command, 2);
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PCI_command, 2);
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val |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
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val |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
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#if 1 /* for broken hardware */
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#if 1 /* for broken hardware */
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val &= ~PCIM_CMD_MWRICEN;
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val &= ~PCIM_CMD_MWRICEN;
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#endif
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#endif
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pci->write_pci_config(info->bus, info->device, info->function,
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gPci->write_pci_config(info->bus, info->device, info->function,
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PCI_command, 2, val);
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PCI_command, 2, val);
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/*
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/*
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@@ -161,28 +161,28 @@ fwohci_pci_attach(int index)
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info->u.h0.interrupt_pin == 0)
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info->u.h0.interrupt_pin == 0)
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info->u.h0.interrupt_pin = 3;
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info->u.h0.interrupt_pin = 3;
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latency = olatency = pci->read_pci_config(info->bus, info->device, info->function,
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latency = olatency = gPci->read_pci_config(info->bus, info->device, info->function,
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PCI_latency, 1);
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PCI_latency, 1);
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#define DEF_LATENCY 0x20
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#define DEF_LATENCY 0x20
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if (olatency < DEF_LATENCY) {
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if (olatency < DEF_LATENCY) {
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latency = DEF_LATENCY;
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latency = DEF_LATENCY;
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pci->write_pci_config(info->bus, info->device, info->function,
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gPci->write_pci_config(info->bus, info->device, info->function,
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PCI_latency, 1, latency);
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PCI_latency, 1, latency);
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}
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}
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cache_line = ocache_line = pci->read_pci_config(info->bus, info->device,
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cache_line = ocache_line = gPci->read_pci_config(info->bus, info->device,
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info->function, PCI_line_size, 1);
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info->function, PCI_line_size, 1);
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#define DEF_CACHE_LINE 8
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#define DEF_CACHE_LINE 8
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if (ocache_line < DEF_CACHE_LINE) {
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if (ocache_line < DEF_CACHE_LINE) {
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cache_line = DEF_CACHE_LINE;
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cache_line = DEF_CACHE_LINE;
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pci->write_pci_config(info->bus, info->device, info->function,
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gPci->write_pci_config(info->bus, info->device, info->function,
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PCI_line_size, 1, cache_line);
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PCI_line_size, 1, cache_line);
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}
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}
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TRACE("latency timer %x -> %x.\n", olatency, latency);
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TRACE("latency timer %x -> %x.\n", olatency, latency);
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TRACE("cache size %x -> %x.\n", ocache_line, cache_line);
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TRACE("cache size %x -> %x.\n", ocache_line, cache_line);
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// get IRQ
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// get IRQ
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sc->irq = pci->read_pci_config(info->bus, info->device, info->function,
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sc->irq = gPci->read_pci_config(info->bus, info->device, info->function,
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PCI_interrupt_line, 1);
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PCI_interrupt_line, 1);
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if (sc->irq == 0 || sc->irq == 0xff) {
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if (sc->irq == 0 || sc->irq == 0xff) {
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ERROR("no IRQ assigned\n");
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ERROR("no IRQ assigned\n");
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@@ -191,7 +191,7 @@ fwohci_pci_attach(int index)
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TRACE("IRQ %d\n", sc->irq);
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TRACE("IRQ %d\n", sc->irq);
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// map registers into memory
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// map registers into memory
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// val = pci->read_pci_config(info->bus, info->device, info->function, 0x14, 4);
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// val = gPci->read_pci_config(info->bus, info->device, info->function, 0x14, 4);
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// val &= PCI_address_memory_32_mask;
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// val &= PCI_address_memory_32_mask;
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// TRACE("hardware register address %p\n", (void *) val);
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// TRACE("hardware register address %p\n", (void *) val);
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TRACE("hardware register address %x\n", info->u.h0.base_registers[0]);
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TRACE("hardware register address %x\n", info->u.h0.base_registers[0]);
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