x86_{read,write}_cr{0,4} can just be implemented as macros, put an x86_ prefix on the other read/write macros for consistency.

headers/private/kernel/arch/x86/arch_cpu.h

@@ -270,19 +270,46 @@ typedef struct arch_cpu_info {
 
 #define nop() __asm__ ("nop"::)
 
-#define read_cr2(value) \
-	__asm__("mov	%%cr2,%0" : "=r" (value))
+#define x86_read_cr0() ({ \
+	size_t _v; \
+	__asm__("mov	%%cr0,%0" : "=r" (_v)); \
+	_v; \
+})
 
-#define read_cr3(value) \
-	__asm__("mov	%%cr3,%0" : "=r" (value))
+#define x86_write_cr0(value) \
+	__asm__("mov	%0,%%cr0" : : "r" (value))
 
-#define write_cr3(value) \
+#define x86_read_cr2() ({ \
+	size_t _v; \
+	__asm__("mov	%%cr2,%0" : "=r" (_v)); \
+	_v; \
+})
+
+#define x86_read_cr3() ({ \
+	size_t _v; \
+	__asm__("mov	%%cr3,%0" : "=r" (_v)); \
+	_v; \
+})
+
+#define x86_write_cr3(value) \
 	__asm__("mov	%0,%%cr3" : : "r" (value))
 
-#define read_dr3(value) \
-	__asm__("mov	%%dr3,%0" : "=r" (value))
+#define x86_read_cr4() ({ \
+	size_t _v; \
+	__asm__("mov	%%cr4,%0" : "=r" (_v)); \
+	_v; \
+})
 
-#define write_dr3(value) \
+#define x86_write_cr4(value) \
+	__asm__("mov	%0,%%cr4" : : "r" (value))
+
+#define x86_read_dr3() ({ \
+	size_t _v; \
+	__asm__("mov	%%dr3,%0" : "=r" (_v)); \
+	_v; \
+})
+
+#define x86_write_dr3(value) \
 	__asm__("mov	%0,%%dr3" : : "r" (value))
 
 #define invalidate_TLB(va) \
@@ -360,10 +387,6 @@ void i386_noop_swap(void* oldFpuState, const void* newFpuState);
 void i386_fnsave_swap(void* oldFpuState, const void* newFpuState);
 void i386_fxsave_swap(void* oldFpuState, const void* newFpuState);
 uint32 x86_read_ebp();
-uint32 x86_read_cr0();
-void x86_write_cr0(uint32 value);
-uint32 x86_read_cr4();
-void x86_write_cr4(uint32 value);
 uint64 x86_read_msr(uint32 registerNumber);
 void x86_write_msr(uint32 registerNumber, uint64 value);
 void x86_set_task_gate(int32 cpu, int32 n, int32 segment);

headers/private/kernel/arch/x86/arch_int.h

@@ -21,7 +21,7 @@ arch_int_enable_interrupts_inline(void)
 static inline int
 arch_int_disable_interrupts_inline(void)
 {
-	unsigned long flags;
+	size_t flags;
 
 	asm volatile("pushf;\n"
 		"pop %0;\n"
@@ -41,7 +41,7 @@ arch_int_restore_interrupts_inline(int oldState)
 static inline bool
 arch_int_are_interrupts_enabled_inline(void)
 {
-	unsigned long flags;
+	size_t flags;
 
 	asm volatile("pushf;\n"
 		"pop %0;\n" : "=g" (flags));

headers/private/kernel/arch/x86/arch_thread.h

@@ -57,8 +57,7 @@ void arch_syscall_64_bit_return_value(void);
 static inline Thread*
 arch_thread_get_current_thread(void)
 {
-	Thread* t;
-	read_dr3(t);
+	Thread* t = (Thread*)x86_read_dr3();
 	return t;
 }
 
@@ -66,7 +65,7 @@ arch_thread_get_current_thread(void)
 static inline void
 arch_thread_set_current_thread(Thread* t)
 {
-	write_dr3(t);
+	x86_write_dr3(t);
 }