From 502f746720cb446237063d6d02cc1d70f1899330 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Mon, 30 Aug 2004 13:46:47 +0000 Subject: [PATCH] BLOOOOOOPP!! Erazor 3 TNT2 coldstart is operational!! Wow! Small note: I probably need to really setup FIFO watermarks now, can't deny it anymore. Cards works beautifully as full secondary card in system in 640x480 8-32bit color, 800x600 8-16 bit color, and 1024x768 in 8 bit color (60Hz tested). Go above that and you'll probably witness CRTC memory fetch errors (distortions, maybe like snow ;-) git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8727 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/nvidia/engine/nv_general.c | 5 +++- .../accelerants/nvidia/engine/nv_info.c | 23 ++++++++++++++++--- 2 files changed, 24 insertions(+), 4 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index ff5b7767b6..3e6c3f20d9 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -782,7 +782,6 @@ void set_crtc_owner(bool head) static status_t nvxx_general_powerup() { LOG(4, ("INIT: NV powerup\n")); - if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); /* fill-in the cardspecs in the shared_info PINS struct */ fake_pins(); @@ -802,6 +801,10 @@ static status_t nvxx_general_powerup() { LOG(2, ("INIT: Skipping card coldstart!\n")); } + + /* dump config space as it is after a possible coldstart attempt */ + if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); + /* log the final PINS struct settings */ dump_pins(); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index fea107aeac..c67a6c60a7 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -174,7 +174,22 @@ static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 in LOG(8,("INFO: executing coldstart...\n")); -//fixme: unlock regs etc...(!) + /* select colormode CRTC registers base adresses */ + NV_REG8(NV8_MISCW) = 0xcb; + + /* enable access to primary head */ + set_crtc_owner(0); + /* unlock head's registers for R/W access */ + CRTCW(LOCK, 0x57); + CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); + if (si->ps.secondary_head) + { + /* enable access to secondary head */ + set_crtc_owner(1); + /* unlock head's registers for R/W access */ + CRTC2W(LOCK, 0x57); + CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); + } /* turn off both displays and the hardcursors (also disables transfers) */ nv_crtc_dpms(false, false, false); @@ -192,6 +207,9 @@ static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 in if (exec_type1_script(rom, init1, &size) != B_OK) result = B_ERROR; if (init2 && (result == B_OK)) if (exec_type1_script(rom, init2, &size) != B_OK) result = B_ERROR; + + /* now enable ROM shadow or the card will remain shut-off! */ + NV_REG32(0x00001800 + NVCFG_ROMSHADOW) |= 0x00000001; } else { @@ -320,8 +338,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size) NV_REG32(reg) = data; NV_REG32(reg) = data2; NV_REG32(0x00001800 + NVCFG_AGPCMD) = safe32; - //don't touch! - //NV_REG32(0x00001800 + NVCFG_ROMSHADOW) &= 0xfffffffe; + NV_REG32(0x00001800 + NVCFG_ROMSHADOW) &= 0xfffffffe; } break; case 0x66: /* new on NV11 */