From 524bea3553f914523ef7bbf4bbb66ef85a3336fc Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Sun, 19 Jan 2014 14:27:09 -0600 Subject: [PATCH] kernel: fix missing cpu cache defines non-x86 * Regression introduced due to scheduler change * Other other non-x86, non-ppc, and non-arm platforms need evalulated for this metric --- headers/private/kernel/arch/arm/arch_cpu.h | 7 +++++++ headers/private/kernel/arch/ppc/arch_cpu.h | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/headers/private/kernel/arch/arm/arch_cpu.h b/headers/private/kernel/arch/arm/arch_cpu.h index fea6c68979..aa7bfd917b 100644 --- a/headers/private/kernel/arch/arm/arch_cpu.h +++ b/headers/private/kernel/arch/arm/arch_cpu.h @@ -5,11 +5,18 @@ #ifndef _KERNEL_ARCH_ARM_CPU_H #define _KERNEL_ARCH_ARM_CPU_H + +#define CPU_MAX_CACHE_LEVEL 8 +#define CACHE_LINE_SIZE 64 + // TODO: Could be 32-bits sometimes? + + #ifndef _ASSEMBLER #include #include + /* raw exception frames */ struct iframe { uint32 spsr; diff --git a/headers/private/kernel/arch/ppc/arch_cpu.h b/headers/private/kernel/arch/ppc/arch_cpu.h index b48adf1548..7195a71285 100644 --- a/headers/private/kernel/arch/ppc/arch_cpu.h +++ b/headers/private/kernel/arch/ppc/arch_cpu.h @@ -10,6 +10,11 @@ #include +#define CPU_MAX_CACHE_LEVEL 8 +#define CACHE_LINE_SIZE 128 + // 128 Byte lines on PPC970 + + struct iframe { uint32 vector; uint32 srr0;