It is accomplished ...
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
ejakowatz
@@ -0,0 +1,151 @@
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/*
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** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_CPU_H
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#define _KERNEL_ARCH_x86_CPU_H
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/* ??? why include this as we're normally included from that file! */
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#include <arch/cpu.h>
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#define KERNEL_CODE_SEG 0x8
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#define KERNEL_DATA_SEG 0x10
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#define USER_CODE_SEG 0x1b
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#define USER_DATA_SEG 0x23
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#define TSS 0x28
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#define PAGE_SIZE 4096
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#define _BIG_ENDIAN 0
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#define _LITTLE_ENDIAN 1
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typedef struct desc_struct {
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unsigned int a,b;
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} desc_table;
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struct tss {
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uint16 prev_task;
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uint16 unused0;
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uint32 sp0;
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uint32 ss0;
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uint32 sp1;
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uint32 ss1;
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uint32 sp2;
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uint32 ss2;
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uint32 sp3;
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uint32 ss3;
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uint32 cr3;
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uint32 eip, eflags, eax, ecx, edx, ebx, esp, ebp, esi, edi;
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uint32 es, cs, ss, ds, fs, gs;
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uint32 ldt_seg_selector;
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uint16 unused1;
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uint16 io_map_base;
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};
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struct tss_descriptor {
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uint16 limit_00_15;
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uint16 base_00_15;
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uint32 base_23_16 : 8;
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uint32 type : 4;
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uint32 zero : 1;
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uint32 dpl : 2;
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uint32 present : 1;
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uint32 limit_19_16 : 4;
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uint32 avail : 1;
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uint32 zero1 : 1;
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uint32 zero2 : 1;
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uint32 granularity : 1;
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uint32 base_31_24 : 8;
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};
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typedef struct ptentry {
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unsigned int present:1;
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unsigned int rw:1;
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unsigned int user:1;
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unsigned int write_through:1;
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unsigned int cache_disabled:1;
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unsigned int accessed:1;
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unsigned int dirty:1;
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unsigned int reserved:1;
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unsigned int global:1;
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unsigned int avail:3;
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unsigned int addr:20;
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} ptentry;
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typedef struct pdentry {
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unsigned int present:1;
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unsigned int rw:1;
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unsigned int user:1;
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unsigned int write_through:1;
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unsigned int cache_disabled:1;
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unsigned int accessed:1;
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unsigned int reserved:1;
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unsigned int page_size:1;
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unsigned int global:1;
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unsigned int avail:3;
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unsigned int addr:20;
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} pdentry;
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#define nop() __asm__ ("nop"::)
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void setup_system_time(unsigned int cv_factor);
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void i386_context_switch(unsigned int **old_esp, unsigned int *new_esp, addr new_pgdir);
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void i386_enter_uspace(addr entry, void *args, addr ustack_top);
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void i386_set_kstack(addr kstack);
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void i386_switch_stack_and_call(addr stack, void (*func)(void *), void *arg);
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void i386_swap_pgdir(addr new_pgdir);
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void i386_fsave_swap(void *old_fpu_state, void *new_fpu_state);
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void i386_fxsave_swap(void *old_fpu_state, void *new_fpu_state);
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#define read_dr3(value) \
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__asm__("movl %%dr3,%0" : "=r" (value))
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#define write_dr3(value) \
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__asm__("movl %0,%%dr3" :: "r" (value))
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#define invalidate_TLB(va) \
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__asm__("invlpg (%0)" : : "r" (va))
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#define out8(value,port) \
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__asm__ ("outb %%al,%%dx"::"a" (value),"d" (port))
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#define out16(value,port) \
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__asm__ ("outw %%ax,%%dx"::"a" (value),"d" (port))
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#define out32(value,port) \
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__asm__ ("outl %%eax,%%dx"::"a" (value),"d" (port))
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#define in8(port) ({ \
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unsigned char _v; \
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__asm__ volatile ("inb %%dx,%%al":"=a" (_v):"d" (port)); \
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_v; \
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})
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#define in16(port) ({ \
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unsigned short _v; \
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__asm__ volatile ("inw %%dx,%%ax":"=a" (_v):"d" (port)); \
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_v; \
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})
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#define in32(port) ({ \
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unsigned int _v; \
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__asm__ volatile ("inl %%dx,%%eax":"=a" (_v):"d" (port)); \
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_v; \
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})
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#define out8_p(value,port) \
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__asm__ ("outb %%al,%%dx\n" \
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"\tjmp 1f\n" \
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"1:\tjmp 1f\n" \
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"1:"::"a" (value),"d" (port))
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#define in8_p(port) ({ \
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unsigned char _v; \
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__asm__ volatile ("inb %%dx,%%al\n" \
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"\tjmp 1f\n" \
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"1:\tjmp 1f\n" \
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"1:":"=a" (_v):"d" (port)); \
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_v; \
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})
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#endif
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@@ -0,0 +1,30 @@
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/*
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** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_KERNEL_H
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#define _KERNEL_ARCH_x86_KERNEL_H
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#include <arch/cpu.h>
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// memory layout
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#define KERNEL_BASE 0x80000000
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#define KERNEL_SIZE 0x80000000
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#define KERNEL_TOP (KERNEL_BASE + (KERNEL_SIZE - 1))
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/*
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** User space layout is a little special:
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** The user space does not completely cover the space not covered by the kernel.
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** This is accomplished by starting user space at 1Mb and running to 64kb short of kernel space.
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** The lower 1Mb reserved spot makes it easy to find null pointer references and guarantees a
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** region wont be placed there. The 64kb region assures a user space thread cannot pass
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** a buffer into the kernel as part of a syscall that would cross into kernel space.
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*/
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#define USER_BASE 0x100000
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#define USER_SIZE (0x80000000 - (0x10000 + 0x100000))
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#define USER_TOP (USER_BASE + USER_SIZE)
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#define USER_STACK_REGION 0x70000000
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#define USER_STACK_REGION_SIZE (USER_BASE + (USER_SIZE - USER_STACK_REGION))
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#endif /* _KERNEL_ARCH_x86_KERNEL_H */
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@@ -0,0 +1,38 @@
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/*
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** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _NEWOS_KERNEL_BOOT_ARCH_I386_STAGE2_H
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#define _NEWOS_KERNEL_BOOT_ARCH_I386_STAGE2_H
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#include <stage2_struct.h>
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#define MAX_BOOT_PTABLES 4
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// kernel args
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typedef struct {
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// architecture specific
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unsigned int system_time_cv_factor;
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unsigned int phys_pgdir;
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unsigned int vir_pgdir;
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unsigned int num_pgtables;
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unsigned int pgtables[MAX_BOOT_PTABLES];
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unsigned int phys_idt;
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unsigned int vir_idt;
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unsigned int phys_gdt;
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unsigned int vir_gdt;
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unsigned int page_hole;
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// smp stuff
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unsigned int apic_time_cv_factor; // apic ticks per second
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unsigned int apic_phys;
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unsigned int *apic;
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unsigned int ioapic_phys;
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unsigned int *ioapic;
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unsigned int cpu_apic_id[MAX_BOOT_CPUS];
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unsigned int cpu_os_id[MAX_BOOT_CPUS];
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unsigned int cpu_apic_version[MAX_BOOT_CPUS];
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} arch_kernel_args;
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#endif
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@@ -0,0 +1,29 @@
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/*
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** Copyright 2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_THREAD_H
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#define _KERNEL_ARCH_x86_THREAD_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <arch/cpu.h>
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extern inline struct thread *arch_thread_get_current_thread(void) {
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struct thread *t;
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read_dr3(t);
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return t;
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}
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extern inline void arch_thread_set_current_thread(struct thread *t) {
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write_dr3(t);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _KERNEL_ARCH_x86_THREAD_H */
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+16
@@ -0,0 +1,16 @@
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/*
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** Copyright 2001, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _CONSOLE_DEV_H
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#define _CONSOLE_DEV_H
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#include <stage2.h>
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int console_dev_init(kernel_args *ka);
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enum {
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CONSOLE_OP_WRITEXY = 2376
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};
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#endif
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Executable
+12
@@ -0,0 +1,12 @@
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/*
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** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _NEWOS_KERNEL_ARCH_I386_FAULTS
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#define _NEWOS_KERNEL_ARCH_I386_FAULTS
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int i386_general_protection_fault(int errorcode);
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int i386_double_fault(int errorcode);
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#endif
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Executable
+9
@@ -0,0 +1,9 @@
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#ifndef _IDE_BUS_H
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#define _IDE_BUS_H
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#include <stage2.h>
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int ide_bus_init(kernel_args *ka);
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||||
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#endif
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+100
@@ -0,0 +1,100 @@
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/*
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** Copyright 2001, Travis Geiselbrecht. All rights reserved.
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||||
** Modified Sep 2001 by Rob Judd <[email protected]>
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
|
||||
#ifndef __IDE_PRIVATE_H__
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#define __IDE_PRIVATE_H__
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#include <types.h>
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#include "partition.h"
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|
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typedef struct
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{
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||||
unsigned short config; /* obsolete stuff */
|
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unsigned short cyls; /* logical cylinders */
|
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unsigned short _reserved_2;
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unsigned short heads; /* logical heads */
|
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unsigned short _vendor_4; /* bytes per track unformatted */
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unsigned short _vendor_5; /* sectors per track unformatted */
|
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unsigned short sectors; /* logical sectors */
|
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unsigned short _vendor_7;
|
||||
unsigned short _vendor_8;
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unsigned short _vendor_9;
|
||||
char serial[20]; //40 /* serial number */
|
||||
unsigned short _vendor_20;
|
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unsigned short _vendor_21;
|
||||
unsigned short vend_bytes_long; /* number of ECC bytes on long cmd */
|
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char firmware[8]; /* firmware revision */
|
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char model[40]; //94 /* model name */
|
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unsigned short mult_support; /* vendor stuff and multiple cmds */
|
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unsigned short _reserved_48; /* bit 0: double word i/o possible */
|
||||
unsigned short capabilities; /* bit 9: LBA; bit 8: DMA support */
|
||||
unsigned short _reserved_50;
|
||||
unsigned short pio; /* bit 15-8: timing mode for PIO */
|
||||
unsigned short dma; /* bit 15-8: timing mode for DMA */
|
||||
unsigned short _reserved_53;
|
||||
unsigned short curr_cyls; /* current logical cylinders */
|
||||
unsigned short curr_heads; /* current logical heads */
|
||||
unsigned short curr_sectors; /* current logical sectors */
|
||||
unsigned long capacity; //118 /* apparent capacity in sectors */
|
||||
unsigned short _pad[511-59]; /* don't need this stuff for now */
|
||||
} ide_hw_id_t;
|
||||
|
||||
#define IDE_MAGIC_COOKIE 0xABCDEF10
|
||||
#define IDE_MAGIC_COOKIE2 0x12345678
|
||||
|
||||
#define NO_DEVICE -1
|
||||
#define UNKNOWN_DEVICE 0
|
||||
#define ATA_DEVICE 1
|
||||
#define ATAPI_DEVICE 2
|
||||
|
||||
#define IDE_NAME 40
|
||||
|
||||
typedef struct s_ide_device
|
||||
{
|
||||
uint32 magic;
|
||||
ide_hw_id_t hardware_device;
|
||||
uint32 magic2;
|
||||
int iobase;
|
||||
int bus;
|
||||
int device;
|
||||
int device_type;
|
||||
uint32 sector_count;
|
||||
int bytes_per_sector;
|
||||
int lba_supported;
|
||||
int start_block;
|
||||
int end_block;
|
||||
tPartition partitions[8]; // 4 Primary + 4 Extended
|
||||
} ide_device;
|
||||
|
||||
#define MAX_IDE_BUSES 2
|
||||
#define MAX_DEVICES 4
|
||||
|
||||
extern ide_device devices[MAX_DEVICES];
|
||||
|
||||
#define DISK_GET_GEOMETRY 1
|
||||
#define DISK_USE_DMA 2
|
||||
#define DISK_USE_BUS_MASTERING 3
|
||||
#define DISK_USE_PIO 4
|
||||
#define DISK_GET_ACCOUSTIC_LEVEL 5
|
||||
#define DISK_SET_ACCOUSTIC_LEVEL 6
|
||||
|
||||
|
||||
typedef struct s_drive_geometry
|
||||
{
|
||||
uint32 blocks;
|
||||
uint32 heads;
|
||||
uint32 cylinders;
|
||||
uint32 sectors;
|
||||
int removable;
|
||||
uint32 bytes_per_sector;
|
||||
int read_only;
|
||||
char model[40];
|
||||
char serial[20];
|
||||
char firmware[8];
|
||||
} drive_geometry;
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+31
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Modified Sep 2001 by Rob Judd <[email protected]>
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
|
||||
#ifndef __IDE_RAW_H__
|
||||
#define __IDE_RAW_H__
|
||||
|
||||
#include "ide_private.h"
|
||||
|
||||
#define NO_ERR 0
|
||||
#define ERR_TIMEOUT 1
|
||||
#define ERR_HARDWARE_ERROR 2
|
||||
#define ERR_DRQ_NOT_SET 3
|
||||
#define ERR_DISK_BUSY 4
|
||||
#define ERR_DEVICE_FAULT 5
|
||||
#define ERR_BUFFER_NOT_EMPTY 6
|
||||
|
||||
int ide_read_block(ide_device *device, char *buffer, uint32 block, uint8 numSectors);
|
||||
int ide_write_block(ide_device *device, const char *buffer, uint32 block, uint8 numSectors);
|
||||
int ide_base (int bus);
|
||||
void ide_string_conv (char *str, int len);
|
||||
int ide_reset (int bus, int device);
|
||||
bool ide_identify_device (int bus, int device);
|
||||
void ide_raw_init(int base1, int base2);
|
||||
bool ide_get_partitions(ide_device *device);
|
||||
int ide_get_accoustic(ide_device *device, int8* level_ptr);
|
||||
int ide_set_accoustic(ide_device *device, int8 level);
|
||||
|
||||
#endif
|
||||
Executable
+19
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _NEWOS_KERNEL_ARCH_I386_INTERRUPTS_H
|
||||
#define _NEWOS_KERNEL_ARCH_I386_INTERRUPTS_H
|
||||
|
||||
void trap0();void trap1();void trap2();void trap3();void trap4();void trap5();
|
||||
void trap6();void trap7();void trap8();void trap9();void trap10();void trap11();
|
||||
void trap12();void trap13();void trap14();void trap16();void trap17();void trap18();
|
||||
void trap32();void trap33();void trap34();void trap35();void trap36();void trap37();
|
||||
void trap38();void trap39();void trap40();void trap41();void trap42();void trap43();
|
||||
void trap44();void trap45();void trap46();void trap47();
|
||||
|
||||
void trap99();
|
||||
|
||||
void trap251();void trap252();void trap253();void trap254();void trap255();
|
||||
#endif
|
||||
|
||||
Executable
+9
@@ -0,0 +1,9 @@
|
||||
#ifndef _KEYBOARD_H
|
||||
#define _KEYBOARD_H
|
||||
|
||||
#include <stage2.h>
|
||||
|
||||
int keyboard_dev_init(kernel_args *ka);
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+84
@@ -0,0 +1,84 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
|
||||
#ifndef __PARTITION_H
|
||||
#define __PARTITION_H
|
||||
|
||||
#define PARTITION_MAGIC1 0x55
|
||||
#define PARTITION_MAGIC2 0xaa
|
||||
#define PART_MAGIC_OFFSET 0x01fe
|
||||
#define PARTITION_OFFSET 0x01be
|
||||
#define NUM_PARTITIONS 4
|
||||
|
||||
#define PTCHSToLBA(c, h, s, scnt, hcnt) ((s) & 0x3f) + \
|
||||
(scnt) * ( (h) + (hcnt) * ((c) | (((s) & 0xc0) << 2)))
|
||||
#define PTLBAToCHS(lba, c, h, s, scnt, hcnt) ( \
|
||||
(s) = (lba) % (scnt) + 1, \
|
||||
(lba) /= (scnt), \
|
||||
(h) = (lba) % (hcnt), \
|
||||
(lba) /= (heads), \
|
||||
(c) = (lba) & 0xff, \
|
||||
(s) |= ((lba) >> 2) & 0xc0)
|
||||
|
||||
/* taken from linux fdisk src */
|
||||
typedef enum PartitionTypes
|
||||
{
|
||||
PTEmpty = 0,
|
||||
PTDOS3xPrimary, /* 1 */
|
||||
PTXENIXRoot, /* 2 */
|
||||
PTXENIXUsr, /* 3 */
|
||||
PTOLDDOS16Bit, /* 4 */
|
||||
PTDosExtended, /* 5 */
|
||||
PTDos5xPrimary, /* 6 */
|
||||
PTOS2HPFS, /* 7 */
|
||||
PTAIX, /* 8 */
|
||||
PTAIXBootable, /* 9 */
|
||||
PTOS2BootMgr, /* 10 */
|
||||
PTWin95FAT32,
|
||||
PTWin95FAT32LBA,
|
||||
PTWin95FAT16LBA,
|
||||
PTWin95ExtendedLBA,
|
||||
PTVenix286 = 0x40,
|
||||
PTNovell = 0x51,
|
||||
PTMicroport = 0x52,
|
||||
PTGnuHurd = 0x63,
|
||||
PTNetware286 = 0x64,
|
||||
PTNetware386 = 0x65,
|
||||
PTPCIX = 0x75,
|
||||
PTOldMinix = 0x80,
|
||||
PTMinix = 0x81,
|
||||
PTLinuxSwap = 0x82,
|
||||
PTLinuxExt2 = 0x83,
|
||||
PTAmoeba = 0x93,
|
||||
PTAmoebaBBT = 0x94,
|
||||
PTBSD = 0xa5,
|
||||
PTBSDIFS = 0xb7,
|
||||
PTBSDISwap = 0xb8,
|
||||
PTSyrinx = 0xc7,
|
||||
PTCPM = 0xdb,
|
||||
PTDOSAccess = 0xe1,
|
||||
PTDOSRO = 0xe3,
|
||||
PTDOSSecondary = 0xf2,
|
||||
PTBBT = 0xff
|
||||
} partitionTypes;
|
||||
|
||||
#define PartitionIsExtended(P) ((P)->PartitionType == PTDosExtended)
|
||||
|
||||
typedef struct sPartition
|
||||
{
|
||||
unsigned char boot_flags;
|
||||
unsigned char starting_head;
|
||||
unsigned char starting_sector;
|
||||
unsigned char starting_cylinder;
|
||||
unsigned char partition_type;
|
||||
unsigned char ending_head;
|
||||
unsigned char ending_sector;
|
||||
unsigned char ending_cylinder;
|
||||
unsigned int starting_block;
|
||||
unsigned int sector_count;
|
||||
|
||||
} tPartition;
|
||||
|
||||
#endif
|
||||
Executable
+106
@@ -0,0 +1,106 @@
|
||||
/*
|
||||
* ps2mouse.c:
|
||||
* PS/2 mouse device driver for NewOS and OpenBeOS.
|
||||
* Author: Elad Lahav ([email protected])
|
||||
* Created: 21.12.2001
|
||||
* Modified: 11.1.2002
|
||||
*/
|
||||
|
||||
/*
|
||||
* A PS/2 mouse is connected to the IBM 8042 controller, and gets its
|
||||
* name from the IBM PS/2 personal computer, which was the first to
|
||||
* use this device. All resources are shared between the keyboard, and
|
||||
* the mouse, referred to as the "Auxiliary Device".
|
||||
* I/O:
|
||||
* ~~~
|
||||
* The controller has 3 I/O registers:
|
||||
* 1. Status (input), mapped to port 64h
|
||||
* 2. Control (output), mapped to port 64h
|
||||
* 3. Data (input/output), mapped to port 60h
|
||||
* Data:
|
||||
* ~~~~
|
||||
* Since a mouse is an input only device, data can only be read, and
|
||||
* not written. A packet read from the mouse data port is composed of
|
||||
* three bytes:
|
||||
* byte 0: status byte, where
|
||||
* - bit 0: Y overflow (1 = true)
|
||||
* - bit 1: X overflow (1 = true)
|
||||
* - bit 2: MSB of Y offset
|
||||
* - bit 3: MSB of X offset
|
||||
* - bit 4: Syncronization bit (always 1)
|
||||
* - bit 5: Middle button (1 = down)
|
||||
* - bit 6: Right button (1 = down)
|
||||
* - bit 7: Left button (1 = down)
|
||||
* byte 1: X position change, since last probed (-127 to +127)
|
||||
* byte 2: Y position change, since last probed (-127 to +127)
|
||||
* Interrupts:
|
||||
* ~~~~~~~~~~
|
||||
* The PS/2 mouse device is connected to interrupt 12, which means that
|
||||
* it uses the second interrupt controller (handles INT8 to INT15). In
|
||||
* order for this interrupt to be enabled, both the 5th interrupt of
|
||||
* the second controller AND the 3rd interrupt of the first controller
|
||||
* (cascade mode) should be unmasked.
|
||||
* The controller uses 3 consecutive interrupts to inform the computer
|
||||
* that it has new data. On the first the data register holds the status
|
||||
* byte, on the second the X offset, and on the 3rd the Y offset.
|
||||
*/
|
||||
|
||||
#ifndef _KERNEL_ARCH_x86_PS2MOUSE_H
|
||||
#define _KERNEL_ARCH_x86_PS2MOUSE_H
|
||||
|
||||
#include <kernel.h>
|
||||
#include <memheap.h>
|
||||
#include <int.h>
|
||||
#include <debug.h>
|
||||
#include <devfs.h>
|
||||
#include <arch/int.h>
|
||||
#include <OS.h>
|
||||
#include <string.h>
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// definitions
|
||||
|
||||
// I/O addresses
|
||||
#define PS2_PORT_DATA 0x60
|
||||
#define PS2_PORT_CTRL 0x64
|
||||
|
||||
// control words
|
||||
#define PS2_CTRL_WRITE_CMD 0x60
|
||||
#define PS2_CTRL_WRITE_AUX 0xD4
|
||||
|
||||
// data words
|
||||
#define PS2_CMD_DEV_INIT 0x43
|
||||
#define PS2_CMD_ENABLE_MOUSE 0xF4
|
||||
#define PS2_CMD_DISABLE_MOUSE 0xF5
|
||||
#define PS2_CMD_RESET_MOUSE 0xFF
|
||||
|
||||
#define PS2_RES_ACK 0xFA
|
||||
#define PS2_RES_RESEND 0xFE
|
||||
|
||||
// interrupts
|
||||
#define INT_BASE 0x20
|
||||
#define INT_PS2_MOUSE 0x0C
|
||||
#define INT_CASCADE 0x02
|
||||
|
||||
#define PACKET_SIZE 3
|
||||
|
||||
/*
|
||||
* mouse_data:
|
||||
* Holds the data read from the PS/2 auxiliary device.
|
||||
*/
|
||||
typedef struct {
|
||||
char status;
|
||||
char delta_x;
|
||||
char delta_y;
|
||||
} mouse_data; // mouse_data
|
||||
|
||||
#ifdef _PS2MOUSE_
|
||||
static mouse_data md_int;
|
||||
static mouse_data md_read;
|
||||
static sem_id mouse_sem;
|
||||
static bool in_read;
|
||||
#endif
|
||||
|
||||
int mouse_dev_init(kernel_args *ka);
|
||||
|
||||
#endif /* _KERNEL_ARCH_x86_PS2MOUSE_H */
|
||||
+96
@@ -0,0 +1,96 @@
|
||||
/*
|
||||
**
|
||||
** Naive RealTek 8139C driver for the DC Broadband Adapter. Some
|
||||
** assistance on names of things from the NetBSD-DC sources.
|
||||
**
|
||||
** (c)2001 Dan Potter
|
||||
** License: X11
|
||||
**
|
||||
*/
|
||||
|
||||
#ifndef _RTL_8139C_H
|
||||
#define _RTL_8139C_H
|
||||
|
||||
/* RTL8139C register definitions */
|
||||
#define RT_IDR0 0x00 /* Mac address */
|
||||
#define RT_MAR0 0x08 /* Multicast filter */
|
||||
#define RT_TXSTATUS0 0x10 /* Transmit status (4 32bit regs) */
|
||||
#define RT_TXSTATUS1 0x14 /* Transmit status (4 32bit regs) */
|
||||
#define RT_TXSTATUS2 0x18 /* Transmit status (4 32bit regs) */
|
||||
#define RT_TXSTATUS3 0x1c /* Transmit status (4 32bit regs) */
|
||||
#define RT_TXADDR0 0x20 /* Tx descriptors (also 4 32bit) */
|
||||
#define RT_TXADDR1 0x24 /* Tx descriptors (also 4 32bit) */
|
||||
#define RT_TXADDR2 0x28 /* Tx descriptors (also 4 32bit) */
|
||||
#define RT_TXADDR3 0x2c /* Tx descriptors (also 4 32bit) */
|
||||
#define RT_RXBUF 0x30 /* Receive buffer start address */
|
||||
#define RT_RXEARLYCNT 0x34 /* Early Rx byte count */
|
||||
#define RT_RXEARLYSTATUS 0x36 /* Early Rx status */
|
||||
#define RT_CHIPCMD 0x37 /* Command register */
|
||||
#define RT_RXBUFTAIL 0x38 /* Current address of packet read (queue tail) */
|
||||
#define RT_RXBUFHEAD 0x3A /* Current buffer address (queue head) */
|
||||
#define RT_INTRMASK 0x3C /* Interrupt mask */
|
||||
#define RT_INTRSTATUS 0x3E /* Interrupt status */
|
||||
#define RT_TXCONFIG 0x40 /* Tx config */
|
||||
#define RT_RXCONFIG 0x44 /* Rx config */
|
||||
#define RT_TIMER 0x48 /* A general purpose counter */
|
||||
#define RT_RXMISSED 0x4C /* 24 bits valid, write clears */
|
||||
#define RT_CFG9346 0x50 /* 93C46 command register */
|
||||
#define RT_CONFIG0 0x51 /* Configuration reg 0 */
|
||||
#define RT_CONFIG1 0x52 /* Configuration reg 1 */
|
||||
#define RT_TIMERINT 0x54 /* Timer interrupt register (32 bits) */
|
||||
#define RT_MEDIASTATUS 0x58 /* Media status register */
|
||||
#define RT_CONFIG3 0x59 /* Config register 3 */
|
||||
#define RT_CONFIG4 0x5A /* Config register 4 */
|
||||
#define RT_MULTIINTR 0x5C /* Multiple interrupt select */
|
||||
#define RT_MII_TSAD 0x60 /* Transmit status of all descriptors (16 bits) */
|
||||
#define RT_MII_BMCR 0x62 /* Basic Mode Control Register (16 bits) */
|
||||
#define RT_MII_BMSR 0x64 /* Basic Mode Status Register (16 bits) */
|
||||
#define RT_AS_ADVERT 0x66 /* Auto-negotiation advertisement reg (16 bits) */
|
||||
#define RT_AS_LPAR 0x68 /* Auto-negotiation link partner reg (16 bits) */
|
||||
#define RT_AS_EXPANSION 0x6A /* Auto-negotiation expansion reg (16 bits) */
|
||||
|
||||
/* RTL8193C command bits; or these together and write teh resulting value
|
||||
into CHIPCMD to execute it. */
|
||||
#define RT_CMD_RESET 0x10
|
||||
#define RT_CMD_RX_ENABLE 0x08
|
||||
#define RT_CMD_TX_ENABLE 0x04
|
||||
#define RT_CMD_RX_BUF_EMPTY 0x01
|
||||
|
||||
/* RTL8139C interrupt status bits */
|
||||
#define RT_INT_PCIERR 0x8000 /* PCI Bus error */
|
||||
#define RT_INT_TIMEOUT 0x4000 /* Set when TCTR reaches TimerInt value */
|
||||
#define RT_INT_RXFIFO_OVERFLOW 0x0040 /* Rx FIFO overflow */
|
||||
#define RT_INT_RXFIFO_UNDERRUN 0x0020 /* Packet underrun / link change */
|
||||
#define RT_INT_RXBUF_OVERFLOW 0x0010 /* Rx BUFFER overflow */
|
||||
#define RT_INT_TX_ERR 0x0008
|
||||
#define RT_INT_TX_OK 0x0004
|
||||
#define RT_INT_RX_ERR 0x0002
|
||||
#define RT_INT_RX_OK 0x0001
|
||||
|
||||
/* RTL8139C transmit status bits */
|
||||
#define RT_TX_CARRIER_LOST 0x80000000 /* Carrier sense lost */
|
||||
#define RT_TX_ABORTED 0x40000000 /* Transmission aborted */
|
||||
#define RT_TX_OUT_OF_WINDOW 0x20000000 /* Out of window collision */
|
||||
#define RT_TX_STATUS_OK 0x00008000 /* Status ok: a good packet was transmitted */
|
||||
#define RT_TX_UNDERRUN 0x00004000 /* Transmit FIFO underrun */
|
||||
#define RT_TX_HOST_OWNS 0x00002000 /* Set to 1 when DMA operation is completed */
|
||||
#define RT_TX_SIZE_MASK 0x00001fff /* Descriptor size mask */
|
||||
|
||||
/* RTL8139C receive status bits */
|
||||
#define RT_RX_MULTICAST 0x00008000 /* Multicast packet */
|
||||
#define RT_RX_PAM 0x00004000 /* Physical address matched */
|
||||
#define RT_RX_BROADCAST 0x00002000 /* Broadcast address matched */
|
||||
#define RT_RX_BAD_SYMBOL 0x00000020 /* Invalid symbol in 100TX packet */
|
||||
#define RT_RX_RUNT 0x00000010 /* Packet size is <64 bytes */
|
||||
#define RT_RX_TOO_LONG 0x00000008 /* Packet size is >4K bytes */
|
||||
#define RT_RX_CRC_ERR 0x00000004 /* CRC error */
|
||||
#define RT_RX_FRAME_ALIGN 0x00000002 /* Frame alignment error */
|
||||
#define RT_RX_STATUS_OK 0x00000001 /* Status ok: a good packet was received */
|
||||
|
||||
/* Realtek PCI vendor ID */
|
||||
#define RT_VENDORID 0x10EC
|
||||
|
||||
/* Realtek Device ID */
|
||||
#define RT_DEVICEID_8139 0x8139
|
||||
|
||||
#endif
|
||||
+37
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _RTL8139_PRIV_H
|
||||
#define _RTL8139_PRIV_H
|
||||
|
||||
#include <kernel.h>
|
||||
#include <vm.h>
|
||||
#include <smp.h>
|
||||
|
||||
typedef struct rtl8139 {
|
||||
int irq;
|
||||
addr phys_base;
|
||||
addr phys_size;
|
||||
addr virt_base;
|
||||
uint16 io_port;
|
||||
region_id region;
|
||||
uint8 mac_addr[6];
|
||||
int txbn;
|
||||
int last_txbn;
|
||||
region_id rxbuf_region;
|
||||
addr rxbuf;
|
||||
sem_id rx_sem;
|
||||
region_id txbuf_region;
|
||||
addr txbuf;
|
||||
sem_id tx_sem;
|
||||
mutex lock;
|
||||
spinlock_t reg_spinlock;
|
||||
} rtl8139;
|
||||
|
||||
int rtl8139_detect(rtl8139 **rtl);
|
||||
int rtl8139_init(rtl8139 *rtl);
|
||||
void rtl8139_xmit(rtl8139 *rtl, const char *ptr, ssize_t len);
|
||||
ssize_t rtl8139_rx(rtl8139 *rtl, char *buf, ssize_t buf_len);
|
||||
|
||||
#endif
|
||||
Executable
+161
@@ -0,0 +1,161 @@
|
||||
/*
|
||||
** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _NEWOS_KERNEL_ARCH_I386_SMP_PRIV_H
|
||||
#define _NEWOS_KERNEL_ARCH_I386_SMP_PRIV_H
|
||||
|
||||
int i386_smp_interrupt(int vector);
|
||||
void arch_smp_ack_interrupt(void);
|
||||
int arch_smp_set_apic_timer(bigtime_t relative_timeout);
|
||||
int arch_smp_clear_apic_timer(void);
|
||||
int smp_intercpu_int_handler(void);
|
||||
|
||||
#define MP_FLT_SIGNATURE '_PM_'
|
||||
#define MP_CTH_SIGNATURE 'PCMP'
|
||||
|
||||
#define APIC_DM_INIT (5 << 8)
|
||||
#define APIC_DM_STARTUP (6 << 8)
|
||||
#define APIC_LEVEL_TRIG (1 << 14)
|
||||
#define APIC_ASSERT (1 << 13)
|
||||
|
||||
#define APIC_ENABLE 0x100
|
||||
#define APIC_FOCUS (~(1 << 9))
|
||||
#define APIC_SIV (0xff)
|
||||
|
||||
#define APIC_ID ((unsigned int *) ((unsigned int) apic + 0x020))
|
||||
#define APIC_VERSION ((unsigned int *) ((unsigned int) apic + 0x030))
|
||||
#define APIC_TPRI ((unsigned int *) ((unsigned int) apic + 0x080))
|
||||
#define APIC_EOI ((unsigned int *) ((unsigned int) apic + 0x0b0))
|
||||
#define APIC_SIVR ((unsigned int *) ((unsigned int) apic + 0x0f0))
|
||||
#define APIC_ESR ((unsigned int *) ((unsigned int) apic + 0x280))
|
||||
#define APIC_ICR1 ((unsigned int *) ((unsigned int) apic + 0x300))
|
||||
#define APIC_ICR2 ((unsigned int *) ((unsigned int) apic + 0x310))
|
||||
#define APIC_LVTT ((unsigned int *) ((unsigned int) apic + 0x320))
|
||||
#define APIC_LINT0 ((unsigned int *) ((unsigned int) apic + 0x350))
|
||||
#define APIC_LVT3 ((unsigned int *) ((unsigned int) apic + 0x370))
|
||||
#define APIC_ICRT ((unsigned int *) ((unsigned int) apic + 0x380))
|
||||
#define APIC_CCRT ((unsigned int *) ((unsigned int) apic + 0x390))
|
||||
#define APIC_TDCR ((unsigned int *) ((unsigned int) apic + 0x3e0))
|
||||
|
||||
#define APIC_ICR1_WRITE_MASK 0xfff3f000
|
||||
#define APIC_ICR1_DELMODE_FIXED 0
|
||||
#define APIC_ICR1_DELMODE_LOWESTPRI (1 << 8)
|
||||
#define APIC_ICR1_DESTMODE_LOG (1 << 11)
|
||||
#define APIC_ICR1_DESTMODE_PHYS 0
|
||||
|
||||
#define APIC_ICR1_READ_MASK 0xfff32000
|
||||
#define APIC_ICR1_DELSTATUS (1 << 12)
|
||||
|
||||
#define APIC_ICR1_DEST_FIELD (0)
|
||||
#define APIC_ICR1_DEST_SELF (1 << 18)
|
||||
#define APIC_ICR1_DEST_ALL (2 << 18)
|
||||
#define APIC_ICR1_DEST_ALL_BUT_SELF (3 << 18)
|
||||
|
||||
|
||||
|
||||
#define APIC_ICR2_MASK 0x00ffffff
|
||||
|
||||
#define APIC_TDCR_2 0x00
|
||||
#define APIC_TDCR_4 0x01
|
||||
#define APIC_TDCR_8 0x02
|
||||
#define APIC_TDCR_16 0x03
|
||||
#define APIC_TDCR_32 0x08
|
||||
#define APIC_TDCR_64 0x09
|
||||
#define APIC_TDCR_128 0x0a
|
||||
#define APIC_TDCR_1 0x0b
|
||||
|
||||
#define APIC_LVTT_MASK 0x000310ff
|
||||
#define APIC_LVTT_VECTOR 0x000000ff
|
||||
#define APIC_LVTT_DS 0x00001000
|
||||
#define APIC_LVTT_M 0x00010000
|
||||
#define APIC_LVTT_TM 0x00020000
|
||||
|
||||
#define APIC_LVT_DM 0x00000700
|
||||
#define APIC_LVT_IIPP 0x00002000
|
||||
#define APIC_LVT_TM 0x00008000
|
||||
#define APIC_LVT_M 0x00010000
|
||||
#define APIC_LVT_OS 0x00020000
|
||||
|
||||
#define APIC_TPR_PRIO 0x000000ff
|
||||
#define APIC_TPR_INT 0x000000f0
|
||||
#define APIC_TPR_SUB 0x0000000f
|
||||
|
||||
#define APIC_SVR_SWEN 0x00000100
|
||||
#define APIC_SVR_FOCUS 0x00000200
|
||||
|
||||
#define APIC_DEST_STARTUP 0x00600
|
||||
|
||||
#define LOPRIO_LEVEL 0x00000010
|
||||
|
||||
#define IOAPIC_ID 0x0
|
||||
#define IOAPIC_VERSION 0x1
|
||||
#define IOAPIC_ARB 0x2
|
||||
#define IOAPIC_REDIR_TABLE 0x10
|
||||
|
||||
#define IPI_CACHE_FLUSH 0x40
|
||||
#define IPI_INV_TLB 0x41
|
||||
#define IPI_INV_PTE 0x42
|
||||
#define IPI_INV_RESCHED 0x43
|
||||
#define IPI_STOP 0x44
|
||||
|
||||
#define MP_EXT_PE 0
|
||||
#define MP_EXT_BUS 1
|
||||
#define MP_EXT_IO_APIC 2
|
||||
#define MP_EXT_IO_INT 3
|
||||
#define MP_EXT_LOCAL_INT 4
|
||||
|
||||
#define MP_EXT_PE_LEN 20
|
||||
#define MP_EXT_BUS_LEN 8
|
||||
#define MP_EXT_IO_APIC_LEN 8
|
||||
#define MP_EXT_IO_INT_LEN 8
|
||||
#define MP_EXT_LOCAL_INT_LEN 8
|
||||
|
||||
struct mp_config_table {
|
||||
unsigned int signature; /* "PCMP" */
|
||||
unsigned short table_len; /* length of this structure */
|
||||
unsigned char mp_rev; /* spec supported, 1 for 1.1 or 4 for 1.4 */
|
||||
unsigned char checksum; /* checksum, all bytes add up to zero */
|
||||
char oem[8]; /* oem identification, not null-terminated */
|
||||
char product[12]; /* product name, not null-terminated */
|
||||
void *oem_table_ptr; /* addr of oem-defined table, zero if none */
|
||||
unsigned short oem_len; /* length of oem table */
|
||||
unsigned short num_entries; /* number of entries in base table */
|
||||
unsigned int apic; /* address of apic */
|
||||
unsigned short ext_len; /* length of extended section */
|
||||
unsigned char ext_checksum; /* checksum of extended table entries */
|
||||
};
|
||||
|
||||
struct mp_flt_struct {
|
||||
unsigned int signature; /* "_MP_" */
|
||||
struct mp_config_table *mpc; /* address of mp configuration table */
|
||||
unsigned char mpc_len; /* length of this structure in 16-byte units */
|
||||
unsigned char mp_rev; /* spec supported, 1 for 1.1 or 4 for 1.4 */
|
||||
unsigned char checksum; /* checksum, all bytes add up to zero */
|
||||
unsigned char mp_feature_1; /* mp system configuration type if no mpc */
|
||||
unsigned char mp_feature_2; /* imcrp */
|
||||
unsigned char mp_feature_3, mp_feature_4, mp_feature_5; /* reserved */
|
||||
};
|
||||
|
||||
struct mp_ext_pe
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char apic_id;
|
||||
unsigned char apic_version;
|
||||
unsigned char cpu_flags;
|
||||
unsigned int signature; /* stepping, model, family, each four bits */
|
||||
unsigned int feature_flags;
|
||||
unsigned int res1, res2;
|
||||
};
|
||||
|
||||
struct mp_ext_ioapic
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char ioapic_id;
|
||||
unsigned char ioapic_version;
|
||||
unsigned char ioapic_flags;
|
||||
unsigned int *addr;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
+200
@@ -0,0 +1,200 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _STAGE2_PRIV_H
|
||||
#define _STAGE2_PRIV_H
|
||||
|
||||
#include <stage2.h>
|
||||
|
||||
extern void _start(unsigned int mem, int in_vesa, unsigned int vesa_ptr);
|
||||
extern void clearscreen(void);
|
||||
extern void kputs(const char *str);
|
||||
extern int dprintf(const char *fmt, ...);
|
||||
extern void sleep(long long time);
|
||||
extern long long system_time(void);
|
||||
extern void execute_n_instructions(int count);
|
||||
void system_time_setup(long a);
|
||||
long long rdtsc();
|
||||
unsigned int get_eflags(void);
|
||||
void set_eflags(unsigned int val);
|
||||
void cpuid(unsigned int selector, unsigned int *data);
|
||||
|
||||
//void put_uint_dec(unsigned int a);
|
||||
//void put_uint_hex(unsigned int a);
|
||||
//void nmessage(const char *str1, unsigned int a, const char *str2);
|
||||
//void nmessage2(const char *str1, unsigned int a, const char *str2, unsigned int b, const char *str3);
|
||||
|
||||
#define ROUNDUP(a, b) (((a) + ((b) - 1)) & (~((b) - 1)))
|
||||
#define ROUNDOWN(a, b) (((a) / (b)) * (b))
|
||||
|
||||
#define PAGE_SIZE 0x1000
|
||||
#define KERNEL_BASE 0x80000000
|
||||
#define KERNEL_ENTRY 0x80000080
|
||||
#define STACK_SIZE 2
|
||||
#define DEFAULT_PAGE_FLAGS (1 | 2) // present/rw
|
||||
#define SCREEN_WIDTH 80
|
||||
#define SCREEN_HEIGHT 24
|
||||
#define ADDR_MASK 0xfffff000
|
||||
|
||||
#define NULL ((void *)0)
|
||||
|
||||
#define _PACKED __attribute__((packed))
|
||||
|
||||
#define IDT_LIMIT 0x800
|
||||
#define GDT_LIMIT 0x800
|
||||
|
||||
struct gdt_idt_descr {
|
||||
unsigned short a;
|
||||
unsigned int *b;
|
||||
} _PACKED;
|
||||
|
||||
// SMP stuff
|
||||
extern int smp_boot(kernel_args *ka, unsigned int kernel_entry);
|
||||
extern void smp_trampoline(void);
|
||||
extern void smp_trampoline_end(void);
|
||||
|
||||
#define MP_FLT_SIGNATURE '_PM_'
|
||||
#define MP_CTH_SIGNATURE 'PCMP'
|
||||
|
||||
#define APIC_DM_INIT (5 << 8)
|
||||
#define APIC_DM_STARTUP (6 << 8)
|
||||
#define APIC_LEVEL_TRIG (1 << 14)
|
||||
#define APIC_ASSERT (1 << 13)
|
||||
|
||||
#define APIC_ENABLE 0x100
|
||||
#define APIC_FOCUS (~(1 << 9))
|
||||
#define APIC_SIV (0xff)
|
||||
|
||||
#define APIC_ID ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x020))
|
||||
#define APIC_VERSION ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x030))
|
||||
#define APIC_TPRI ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x080))
|
||||
#define APIC_EOI ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x0b0))
|
||||
#define APIC_LDR ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x0d0))
|
||||
#define APIC_SIVR ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x0f0))
|
||||
#define APIC_ESR ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x280))
|
||||
#define APIC_ICR1 ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x300))
|
||||
#define APIC_ICR2 ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x310))
|
||||
#define APIC_LVTT ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x320))
|
||||
#define APIC_LINT0 ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x350))
|
||||
#define APIC_LINT1 ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x360))
|
||||
#define APIC_LVT3 ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x370))
|
||||
#define APIC_ICRT ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x380))
|
||||
#define APIC_CCRT ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x390))
|
||||
#define APIC_TDCR ((unsigned int *) ((unsigned int) ka->arch_args.apic + 0x3e0))
|
||||
|
||||
#define APIC_TDCR_2 0x00
|
||||
#define APIC_TDCR_4 0x01
|
||||
#define APIC_TDCR_8 0x02
|
||||
#define APIC_TDCR_16 0x03
|
||||
#define APIC_TDCR_32 0x08
|
||||
#define APIC_TDCR_64 0x09
|
||||
#define APIC_TDCR_128 0x0a
|
||||
#define APIC_TDCR_1 0x0b
|
||||
|
||||
#define APIC_LVTT_MASK 0x000310ff
|
||||
#define APIC_LVTT_VECTOR 0x000000ff
|
||||
#define APIC_LVTT_DS 0x00001000
|
||||
#define APIC_LVTT_M 0x00010000
|
||||
#define APIC_LVTT_TM 0x00020000
|
||||
|
||||
#define APIC_LVT_DM_ExtINT 0x00000700
|
||||
#define APIC_LVT_DM_NMI 0x00000400
|
||||
#define APIC_LVT_IIPP 0x00002000
|
||||
#define APIC_LVT_TM 0x00008000
|
||||
#define APIC_LVT_M 0x00010000
|
||||
#define APIC_LVT_OS 0x00020000
|
||||
#define APIC_TPR_PRIO 0x000000ff
|
||||
#define APIC_TPR_INT 0x000000f0
|
||||
#define APIC_TPR_SUB 0x0000000f
|
||||
|
||||
#define APIC_SVR_SWEN 0x00000100
|
||||
#define APIC_SVR_FOCUS 0x00000200
|
||||
|
||||
#define APIC_DEST_STARTUP 0x00600
|
||||
|
||||
#define LOPRIO_LEVEL 0x00000010
|
||||
|
||||
#define APIC_DEST_FIELD (0)
|
||||
#define APIC_DEST_SELF (1 << 18)
|
||||
#define APIC_DEST_ALL (2 << 18)
|
||||
#define APIC_DEST_ALL_BUT_SELF (3 << 18)
|
||||
|
||||
#define IOAPIC_ID 0x0
|
||||
#define IOAPIC_VERSION 0x1
|
||||
#define IOAPIC_ARB 0x2
|
||||
#define IOAPIC_REDIR_TABLE 0x10
|
||||
|
||||
#define IPI_CACHE_FLUSH 0x40
|
||||
#define IPI_INV_TLB 0x41
|
||||
#define IPI_INV_PTE 0x42
|
||||
#define IPI_INV_RESCHED 0x43
|
||||
#define IPI_STOP 0x44
|
||||
|
||||
#define MP_EXT_PE 0
|
||||
#define MP_EXT_BUS 1
|
||||
#define MP_EXT_IO_APIC 2
|
||||
#define MP_EXT_IO_INT 3
|
||||
#define MP_EXT_LOCAL_INT 4
|
||||
|
||||
#define MP_EXT_PE_LEN 20
|
||||
#define MP_EXT_BUS_LEN 8
|
||||
#define MP_EXT_IO_APIC_LEN 8
|
||||
#define MP_EXT_IO_INT_LEN 8
|
||||
#define MP_EXT_LOCAL_INT_LEN 8
|
||||
|
||||
struct mp_config_table {
|
||||
unsigned int signature; /* "PCMP" */
|
||||
unsigned short table_len; /* length of this structure */
|
||||
unsigned char mp_rev; /* spec supported, 1 for 1.1 or 4 for 1.4 */
|
||||
unsigned char checksum; /* checksum, all bytes add up to zero */
|
||||
char oem[8]; /* oem identification, not null-terminated */
|
||||
char product[12]; /* product name, not null-terminated */
|
||||
void *oem_table_ptr; /* addr of oem-defined table, zero if none */
|
||||
unsigned short oem_len; /* length of oem table */
|
||||
unsigned short num_entries; /* number of entries in base table */
|
||||
unsigned int apic; /* address of apic */
|
||||
unsigned short ext_len; /* length of extended section */
|
||||
unsigned char ext_checksum; /* checksum of extended table entries */
|
||||
};
|
||||
|
||||
struct mp_flt_struct {
|
||||
unsigned int signature; /* "_MP_" */
|
||||
struct mp_config_table *mpc; /* address of mp configuration table */
|
||||
unsigned char mpc_len; /* length of this structure in 16-byte units */
|
||||
unsigned char mp_rev; /* spec supported, 1 for 1.1 or 4 for 1.4 */
|
||||
unsigned char checksum; /* checksum, all bytes add up to zero */
|
||||
unsigned char mp_feature_1; /* mp system configuration type if no mpc */
|
||||
unsigned char mp_feature_2; /* imcrp */
|
||||
unsigned char mp_feature_3, mp_feature_4, mp_feature_5; /* reserved */
|
||||
};
|
||||
|
||||
struct mp_ext_pe
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char apic_id;
|
||||
unsigned char apic_version;
|
||||
unsigned char cpu_flags;
|
||||
unsigned int signature; /* stepping, model, family, each four bits */
|
||||
unsigned int feature_flags;
|
||||
unsigned int res1, res2;
|
||||
};
|
||||
|
||||
struct mp_ext_ioapic
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char ioapic_id;
|
||||
unsigned char ioapic_version;
|
||||
unsigned char ioapic_flags;
|
||||
unsigned int *addr;
|
||||
};
|
||||
|
||||
struct mp_ext_bus
|
||||
{
|
||||
unsigned char type;
|
||||
unsigned char bus_id;
|
||||
char name[6];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
+20
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _NEWOS_KERNEL_ARCH_I386_THREAD_STRUCT_H
|
||||
#define _NEWOS_KERNEL_ARCH_I386_THREAD_STRUCT_H
|
||||
|
||||
// architecture specific thread info
|
||||
struct arch_thread {
|
||||
unsigned int *esp;
|
||||
// 512 byte floating point save point
|
||||
uint8 fpu_state[512];
|
||||
};
|
||||
|
||||
struct arch_proc {
|
||||
// nothing here
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+11
@@ -0,0 +1,11 @@
|
||||
/*
|
||||
** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _NEWOS_KERNEL_ARCH_I386_TIMER
|
||||
#define _NEWOS_KERNEL_ARCH_I386_TIMER
|
||||
|
||||
int apic_timer_interrupt(void);
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+31
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _ARCH_x86_TYPES_H
|
||||
#define _ARCH_x86_TYPES_H
|
||||
|
||||
#ifndef WIN32
|
||||
typedef unsigned long long uint64;
|
||||
typedef long long int64;
|
||||
#else /* WIN32 */
|
||||
typedef unsigned __int64 uint64;
|
||||
typedef __int64 int64;
|
||||
#endif
|
||||
|
||||
typedef unsigned int uint32;
|
||||
typedef int int32;
|
||||
typedef unsigned short uint16;
|
||||
typedef short int16;
|
||||
typedef unsigned char uint8;
|
||||
typedef char int8;
|
||||
typedef unsigned long addr;
|
||||
|
||||
#define _OBOS_TIME_T_ int /* basic time_t type */
|
||||
|
||||
/* define this as not all platforms have it set, but we'll make sure as
|
||||
* some conditional checks need it
|
||||
*/
|
||||
#define __INTEL__ 1
|
||||
|
||||
#endif /* _ARCH_x86_TYPES_H */
|
||||
Executable
+66
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
** Copyright 2001, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _STAGE2_VESA_H
|
||||
#define _STAGE2_VESA_H
|
||||
|
||||
#include <ktypes.h>
|
||||
|
||||
struct VBEInfoBlock {
|
||||
char signature[4]; // should be 'VESA'
|
||||
uint16 version;
|
||||
uint32 oem_ptr;
|
||||
uint32 capabilities;
|
||||
uint32 video_ptr;
|
||||
uint16 total_memory;
|
||||
// VESA 2.x stuff
|
||||
uint16 oem_software_rev;
|
||||
uint32 oem_vendor_name_ptr;
|
||||
uint32 oem_product_name_ptr;
|
||||
uint32 oem_product_rev_ptr;
|
||||
uint8 reserved[222];
|
||||
uint8 oem_data[256];
|
||||
} _PACKED;
|
||||
|
||||
struct VBEModeInfoBlock {
|
||||
uint16 attributes;
|
||||
uint8 wina_attributes;
|
||||
uint8 winb_attributes;
|
||||
uint16 win_granulatiry;
|
||||
uint16 win_size;
|
||||
uint16 wina_segment;
|
||||
uint16 winb_segment;
|
||||
uint32 win_function_ptr;
|
||||
uint16 bytes_per_scanline;
|
||||
|
||||
uint16 x_resolution;
|
||||
uint16 y_resolution;
|
||||
uint8 x_charsize;
|
||||
uint8 y_charsize;
|
||||
uint8 num_planes;
|
||||
uint8 bits_per_pixel;
|
||||
uint8 num_banks;
|
||||
uint8 memory_model;
|
||||
uint8 bank_size;
|
||||
uint8 num_image_pages;
|
||||
uint8 _reserved;
|
||||
|
||||
uint8 red_mask_size;
|
||||
uint8 red_field_position;
|
||||
uint8 green_mask_size;
|
||||
uint8 green_field_position;
|
||||
uint8 blue_mask_size;
|
||||
uint8 blue_field_position;
|
||||
uint8 reserved_mask_size;
|
||||
uint8 reserved_field_position;
|
||||
uint8 direct_color_mode_info;
|
||||
|
||||
uint32 phys_base_ptr;
|
||||
uint32 offscreen_mem_offset;
|
||||
uint16 offscreen_mem_size;
|
||||
uint8 _reserved2[206];
|
||||
} _PACKED;
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+10
@@ -0,0 +1,10 @@
|
||||
/*
|
||||
** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
|
||||
** Distributed under the terms of the NewOS License.
|
||||
*/
|
||||
#ifndef _NEWOS_KERNEL_ARCH_I386_VM_H
|
||||
#define _NEWOS_KERNEL_ARCH_I386_VM_H
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user