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kernel/x86_64: clear any pending exceptions on #MF

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* also on x86 for simplicity.
* fixes #18624
* also makes x87 FPU data registers available for x87 floating instructions. EMMS is cheap.
see https://github.com/cloudius-systems/osv/commit/25209d81f7b872111beb02ab9758f0d86898ec6b

Change-Id: I5c1b399377102f3eb10bc6d7f7247afbaf6d8483
Reviewed-on: https://review.haiku-os.org/c/haiku/+/7089
Reviewed-by: waddlesplash <[email protected]>
Reviewed-by: Adrien Destugues <[email protected]>
This commit is contained in:
Jérôme Duval
2023-10-31 18:15:42 +00:00
parent 106388ddbf
commit 53e2dc0f85
2 changed files with 5 additions and 0 deletions
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headers/private/kernel/arch/x86/64/cpu.h
+2
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@@ -48,6 +48,8 @@ x86_context_switch(arch_thread* oldState, arch_thread* newState)
"r14", "r15", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "r14", "r15", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5",
"xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13",
"xmm14", "xmm15", "memory"); "xmm14", "xmm15", "memory");
// so that x87 FPU floating-point instructions can be executed
asm volatile("emms");
asm volatile("ldmxcsr %0" : : "m" (sseControl)); asm volatile("ldmxcsr %0" : : "m" (sseControl));
asm volatile("fldcw %0" : : "m" (fpuControl)); asm volatile("fldcw %0" : : "m" (fpuControl));
} }
src/system/kernel/arch/x86/arch_int.cpp
+3
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@@ -161,6 +161,9 @@ x86_unexpected_exception(iframe* frame)
// TODO: Determine the correct cause via the FPU status // TODO: Determine the correct cause via the FPU status
// register! // register!
signalAddress = frame->ip; signalAddress = frame->ip;
// clear any pending exceptions, otherwise loading a new control word
// could raise exceptions.
asm volatile("fnclex");
break; break;
case 17: // Alignment Check Exception (#AC) case 17: // Alignment Check Exception (#AC)