add nvidia accelerant
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5451 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
shatty
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SubDir OBOS_TOP src add-ons accelerants nvidia ;
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UsePrivateHeaders graphics ;
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UsePrivateHeaders [ FDirName graphics nvidia ] ;
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UseHeaders engine ;
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Addon nv.accelerant : accelerants :
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Acceleration.c
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Cursor.c
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EngineManagment.c
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GetAccelerantHook.c
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GetDeviceInfo.c
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GetModeInfo.c
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GetTimingConstraints.c
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GlobalData.c
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InitAccelerant.c
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Overlay.c
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ProposeDisplayMode.c
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SetDisplayMode.c
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: false : libnvidia_engine.a
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;
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SubInclude OBOS_TOP src add-ons accelerants nvidia engine ;
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/*
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Copyright 1999, Be Incorporated. All Rights Reserved.
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This file may be used under the terms of the Be Sample Code License.
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*/
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#if !defined(GENERIC_H)
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#define GENERIC_H
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#include <Accelerant.h>
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#include "video_overlay.h"
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#define DEBUG 1
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status_t INIT_ACCELERANT(int fd);
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ssize_t ACCELERANT_CLONE_INFO_SIZE(void);
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void GET_ACCELERANT_CLONE_INFO(void *data);
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status_t CLONE_ACCELERANT(void *data);
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void UNINIT_ACCELERANT(void);
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status_t GET_ACCELERANT_DEVICE_INFO(accelerant_device_info *adi);
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sem_id ACCELERANT_RETRACE_SEMAPHORE(void);
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uint32 ACCELERANT_MODE_COUNT(void);
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status_t GET_MODE_LIST(display_mode *dm);
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status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, const display_mode *high);
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status_t SET_DISPLAY_MODE(display_mode *mode_to_set);
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status_t GET_DISPLAY_MODE(display_mode *current_mode);
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status_t GET_FRAME_BUFFER_CONFIG(frame_buffer_config *a_frame_buffer);
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status_t GET_PIXEL_CLOCK_LIMITS(display_mode *dm, uint32 *low, uint32 *high);
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status_t MOVE_DISPLAY(uint16 h_display_start, uint16 v_display_start);
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status_t GET_TIMING_CONSTRAINTS(display_timing_constraints *dtc);
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void SET_INDEXED_COLORS(uint count, uint8 first, uint8 *color_data, uint32 flags);
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uint32 DPMS_CAPABILITIES(void);
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uint32 DPMS_MODE(void);
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status_t SET_DPMS_MODE(uint32 dpms_flags);
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status_t SET_CURSOR_SHAPE(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y, uint8 *andMask, uint8 *xorMask);
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void MOVE_CURSOR(uint16 x, uint16 y);
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void SHOW_CURSOR(bool is_visible);
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uint32 ACCELERANT_ENGINE_COUNT(void);
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status_t ACQUIRE_ENGINE(uint32 capabilities, uint32 max_wait, sync_token *st, engine_token **et);
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status_t RELEASE_ENGINE(engine_token *et, sync_token *st);
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void WAIT_ENGINE_IDLE(void);
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status_t GET_SYNC_TOKEN(engine_token *et, sync_token *st);
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status_t SYNC_TO_TOKEN(sync_token *st);
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void SCREEN_TO_SCREEN_BLIT(engine_token *et, blit_params *list, uint32 count);
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void SCREEN_TO_SCREEN_TRANSPARENT_BLIT(engine_token *et, uint32 transparent_colour, blit_params *list, uint32 count);
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void FILL_RECTANGLE(engine_token *et, uint32 color, fill_rect_params *list, uint32 count);
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void INVERT_RECTANGLE(engine_token *et, fill_rect_params *list, uint32 count);
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void FILL_SPAN(engine_token *et, uint32 color, uint16 *list, uint32 count);
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/* video_overlay */
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uint32 OVERLAY_COUNT(const display_mode *dm);
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const uint32 *OVERLAY_SUPPORTED_SPACES(const display_mode *dm);
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uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space);
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const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint16 height);
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status_t RELEASE_OVERLAY_BUFFER(const overlay_buffer *ob);
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status_t GET_OVERLAY_CONSTRAINTS(const display_mode *dm, const overlay_buffer *ob, overlay_constraints *oc);
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overlay_token ALLOCATE_OVERLAY(void);
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status_t RELEASE_OVERLAY(overlay_token ot);
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status_t CONFIGURE_OVERLAY(overlay_token ot, const overlay_buffer *ob, const overlay_window *ow, const overlay_view *ov);
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#endif
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@@ -0,0 +1,19 @@
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SubDir OBOS_TOP src add-ons accelerants nvidia engine ;
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UsePrivateHeaders graphics ;
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UsePrivateHeaders [ FDirName graphics nvidia ] ;
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UseHeaders [ FDirName $(SUBDIR) .. ] ;
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StaticLibrary nvidia_engine :
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nv_acc.c
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nv_bes.c
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nv_crtc.c
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nv_crtc2.c
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nv_dac.c
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nv_general.c
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nv_i2c.c
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nv_info.c
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nv_maven.c
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nv_maventv.c
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nv_support.c
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;
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/*general card functions*/
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status_t nv_general_powerup();
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status_t nv_set_cas_latency();
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status_t gx50_general_output_select();
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status_t nv_general_dac_select(int);
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status_t nv_general_wait_retrace();
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status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row);
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//status_t nv_general_bios_to_powergraphics();
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/* apsed: logging macros */
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#define MSG(args) do { /* if needed or si->settings with si NULL */ \
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nv_log args; \
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} while (0)
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#define LOG(level_bit, args) do { \
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uint32 mod = (si->settings.logmask & 0xfffffff0) & MODULE_BIT; \
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uint32 lev = (si->settings.logmask & ~0xfffffff0) & level_bit; \
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if (mod && lev) nv_log args; \
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} while (0)
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/*support functions*/
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void delay(bigtime_t i);
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void nv_log(char *format, ...);
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/*i2c maven functions*/
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int i2c_maven_read(unsigned char address);
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void i2c_maven_write(unsigned char address, unsigned char data);
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status_t i2c_init(void);
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status_t i2c_maven_probe(void);
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/*card info functions*/
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status_t parse_pins(void);
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status_t pins5_read(uint8 *pins, uint8 length);
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void fake_pins(void);
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void pinsnv4_fake(void);
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void pinsnv5_nv5m64_fake(void);
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void pinsnv6_fake(void);
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void pinsnv10_arch_fake(void);
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void pinsnv20_arch_fake(void);
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void pinsnv30_arch_fake(void);
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void getstrap_arch_nv4(void);
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void getstrap_arch_nv10_20(void);
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void dump_pins(void);
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/*DAC functions*/
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status_t nv_dac_mode(int,float);
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status_t nv_dac_palette(uint8*,uint8*,uint8*);
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status_t nv_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8);
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status_t nv_dac_set_pix_pll(display_mode target);
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status_t g400_dac_set_sys_pll();
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/*MAVEN functions*/
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status_t nv_maven_dpms(uint8, uint8, uint8);
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status_t nv_maven_set_timing(display_mode target);
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status_t nv_maven_mode(int,float);
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status_t g100_g400max_maven_vid_pll_find(display_mode target,float * calc_pclk,
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uint8 * m_result,uint8 * n_result,uint8 * p_result);
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status_t nv_maven_set_vid_pll(display_mode target);
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/*MAVENTV functions*/
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status_t g100_g400max_maventv_vid_pll_find(
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display_mode target, unsigned int * ht_new, unsigned int * ht_last_line,
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uint8 * m_result, uint8 * n_result, uint8 * p_result);
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int maventv_init(display_mode target);
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/*CRTC1 functions*/
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status_t nv_crtc_validate_timing(
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uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht,
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uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt
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);
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status_t nv_crtc_set_timing(display_mode target);
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status_t nv_crtc_depth(int mode);
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status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp);
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status_t nv_crtc_set_display_pitch();
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status_t nv_crtc_dpms(bool, bool, bool);
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status_t nv_crtc_dpms_fetch(bool*, bool*, bool*);
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status_t nv_crtc_mem_priority(uint8);
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status_t nv_crtc_cursor_init(); /*Yes, cursor follows CRTC1 - not the DAC!*/
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status_t nv_crtc_cursor_define(uint8*,uint8*);
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status_t nv_crtc_cursor_position(uint16 x ,uint16 y);
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status_t nv_crtc_cursor_show();
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status_t nv_crtc_cursor_hide();
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/*CRTC2 functions*/
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/*XXX - validate_timing*/
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status_t g400_crtc2_set_timing(display_mode target);
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status_t g400_crtc2_depth(int mode);
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status_t g400_crtc2_set_display_pitch();
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status_t g400_crtc2_set_display_start(uint32 startadd,uint8 bpp);
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status_t g400_crtc2_dpms(uint8 display,uint8 h,uint8 v);
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status_t g400_crtc2_dpms_fetch(uint8 * display,uint8 * h,uint8 * v);
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/*acceleration functions*/
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status_t check_acc_capability(uint32 feature);
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status_t nv_acc_init();
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status_t nv_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
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status_t nv_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
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status_t nv_acc_blit(uint16,uint16,uint16, uint16,uint16,uint16 );
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status_t nv_acc_transparent_blit(uint16,uint16,uint16, uint16,uint16,uint16, uint32);
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status_t nv_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
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uint16 xd,uint16 yd,uint16 wd,uint16 hd);
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status_t nv_acc_wait_idle();
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/*backend scaler functions*/
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status_t check_overlay_capability(uint32 feature);
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status_t nv_configure_bes
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(const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset);
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status_t nv_release_bes();
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/* I2C functions */
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status_t i2c_sec_tv_adapter();
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/*driver structures and enums*/
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enum{BPP8=0,BPP15=1,BPP16=2,BPP24=3,BPP32DIR=4,BPP32=7};
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enum{DS_CRTC1DAC_CRTC2MAVEN, DS_CRTC1MAVEN_CRTC2DAC, DS_CRTC1CON1_CRTC2CON2, DS_CRTC1CON2_CRTC2CON1};
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extern int fd;
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extern shared_info *si;
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extern area_id shared_info_area;
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extern area_id regs_area;
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extern vuint32 *regs;
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extern display_mode *my_mode_list;
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extern area_id my_mode_list_area;
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extern int accelerantIsClone;
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extern nv_get_set_pci nv_pci_access;
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/*This file can be used to define custom timing for your monitor
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* The format of each line is:
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* {
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* pixel clock frequency (kHz)
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* width
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* h-sync pulse start
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* h-sync pulse end
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* total pixels in line
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* height
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* v-sync pulse start
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* v-sync pulse end
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* total lines in frame
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* sync polarity (0 is -ve,B_POSITIVE_HYSNC,B_POSITIVE_VSYNC)
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* }
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*
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*To use this you must:
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* Uncomment VALID MODE REQUIRED
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* Fill in a number of modes that work with your display
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* Change VALID MODES from three to the no. you defined
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* run these commands:
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* touch ProposeDisplayMode.c
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* make install
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*/
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//#define VALID_MODE_REQUIRED 1
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#define VALID_MODES 3
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/*note colour depth and mode flags are ignored*/
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static const display_timing valid_mode_list[] = {
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{31500,640,648,744,840,480,481,500,500,0},
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{49500,800,808,888,1056,600,601,620,625,B_POSITIVE_HSYNC|B_POSITIVE_VSYNC},
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{78750,1024,1032,1128,1312,768,769,788,800,B_POSITIVE_HSYNC|B_POSITIVE_VSYNC}
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};
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