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intel_extreme: fix vblank interrupt for Ironlake

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Ironlake and SandyBridge use the same layout for the interrupt register.
Previous generations don't use PCH so the interrupt register is
different. Next generations shuffle the bits again to make space for a
3rd display pipe.

Thanks to D3ant for letting me test this on his computer!
This commit is contained in:
Adrien Destugues
2019-11-21 21:11:54 +01:00
parent b240f0ad50
commit 56cddb517d
1 changed files with 9 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
+9 -5
View File
@@ -102,9 +102,12 @@ intel_get_interrupt_mask(intel_info& info, int pipes, bool enable)
// Intel changed the PCH register mapping between Sandy Bridge and the // Intel changed the PCH register mapping between Sandy Bridge and the
// later generations (Ivy Bridge and up). // later generations (Ivy Bridge and up).
// The PCH register itself does not exist in pre-PCH platforms, and the
// previous interrupt register of course also had a different mapping.
if ((pipes & INTEL_PIPE_A) != 0) { if ((pipes & INTEL_PIPE_A) != 0) {
if (info.device_type.InGroup(INTEL_GROUP_SNB)) if (info.device_type.InGroup(INTEL_GROUP_SNB)
|| info.device_type.InGroup(INTEL_GROUP_ILK))
mask |= PCH_INTERRUPT_VBLANK_PIPEA_SNB; mask |= PCH_INTERRUPT_VBLANK_PIPEA_SNB;
else if (hasPCH) else if (hasPCH)
mask |= PCH_INTERRUPT_VBLANK_PIPEA; mask |= PCH_INTERRUPT_VBLANK_PIPEA;
@@ -113,7 +116,8 @@ intel_get_interrupt_mask(intel_info& info, int pipes, bool enable)
} }
if ((pipes & INTEL_PIPE_B) != 0) { if ((pipes & INTEL_PIPE_B) != 0) {
if (info.device_type.InGroup(INTEL_GROUP_SNB)) if (info.device_type.InGroup(INTEL_GROUP_SNB)
|| info.device_type.InGroup(INTEL_GROUP_ILK))
mask |= PCH_INTERRUPT_VBLANK_PIPEB_SNB; mask |= PCH_INTERRUPT_VBLANK_PIPEB_SNB;
else if (hasPCH) else if (hasPCH)
mask |= PCH_INTERRUPT_VBLANK_PIPEB; mask |= PCH_INTERRUPT_VBLANK_PIPEB;
@@ -123,15 +127,15 @@ intel_get_interrupt_mask(intel_info& info, int pipes, bool enable)
#if 0 // FIXME enable when we support the 3rd pipe #if 0 // FIXME enable when we support the 3rd pipe
if ((pipes & INTEL_PIPE_C) != 0) { if ((pipes & INTEL_PIPE_C) != 0) {
if (hasPCH && !info.device_type.InGroup(INTEL_GROUP_SNB)) // Older generations only had two pipes
if (hasPCH && info.device_type.Generation() > 6)
mask |= PCH_INTERRUPT_VBLANK_PIPEC; mask |= PCH_INTERRUPT_VBLANK_PIPEC;
} }
#endif #endif
// On SandyBridge, there is an extra "global enable" flag, which must also // On SandyBridge, there is an extra "global enable" flag, which must also
// be set when enabling the interrupts (but not when testing for them). // be set when enabling the interrupts (but not when testing for them).
if (enable && (info.device_type.InGroup(INTEL_GROUP_SNB) if (enable && info.device_type.InFamily(INTEL_FAMILY_SER5))
|| info.device_type.InGroup(INTEL_GROUP_HAS)))
mask |= PCH_INTERRUPT_GLOBAL_SNB; mask |= PCH_INTERRUPT_GLOBAL_SNB;
return mask; return mask;