diff --git a/headers/private/graphics/radeon_hd/radeon_hd.h b/headers/private/graphics/radeon_hd/radeon_hd.h index bd290b7a07..d860e28471 100644 --- a/headers/private/graphics/radeon_hd/radeon_hd.h +++ b/headers/private/graphics/radeon_hd/radeon_hd.h @@ -106,7 +106,7 @@ struct radeon_shared_info { uint16 cursor_hot_x; uint16 cursor_hot_y; - uint32 device_chipset; + uint16 device_chipset; char device_identifier[32]; struct pll_info pll_info; }; diff --git a/src/add-ons/accelerants/radeon_hd/accelerant.cpp b/src/add-ons/accelerants/radeon_hd/accelerant.cpp index 9489236be8..74b6267cfe 100644 --- a/src/add-ons/accelerants/radeon_hd/accelerant.cpp +++ b/src/add-ons/accelerants/radeon_hd/accelerant.cpp @@ -165,14 +165,8 @@ uninit_common(void) /*! Populate gRegister with device dependant register locations */ static status_t -init_registers() +init_registers(uint16 chipset) { - // gInfo should always be populated before running this - if (gInfo == NULL) - return B_ERROR; - - uint16_t chipset = gInfo->shared_info->device_chipset; - if (chipset >= RADEON_R800) { gRegister->regOffsetCRT0 = EVERGREEN_CRTC0_REGISTER_OFFSET; gRegister->regOffsetCRT1 = EVERGREEN_CRTC1_REGISTER_OFFSET; @@ -233,15 +227,14 @@ radeon_init_accelerant(int device) if (status != B_OK) return status; - status = init_registers(); - if (status != B_OK) - return status; - radeon_shared_info &info = *gInfo->shared_info; init_lock(&info.accelerant_lock, "radeon hd accelerant"); init_lock(&info.engine_lock, "radeon hd engine"); + status = init_registers(info.device_chipset); + if (status != B_OK) + return status; status = create_mode_list(); if (status != B_OK) { diff --git a/src/add-ons/accelerants/radeon_hd/mode.cpp b/src/add-ons/accelerants/radeon_hd/mode.cpp index 53bb52be1e..7cb6860a45 100644 --- a/src/add-ons/accelerants/radeon_hd/mode.cpp +++ b/src/add-ons/accelerants/radeon_hd/mode.cpp @@ -136,7 +136,7 @@ CardBlankSet(int crtNumber, bool blank) int blackColorReg; int blankControlReg; - if (crtNumber == 2) { + if (crtNumber == 1) { blackColorReg = D2CRTC_BLACK_COLOR; blankControlReg = D2CRTC_BLANK_CONTROL; } else { @@ -287,7 +287,6 @@ CardModeScale(int crtNumber, display_mode *mode) uint16_t regOffset = (crtNumber == 0) ? gRegister->regOffsetCRT0 : gRegister->regOffsetCRT1; - /* D1Mode registers */ write32(regOffset + gRegister->viewportSize, mode->timing.v_display | (mode->timing.h_display << 16)); write32(regOffset + gRegister->viewportStart, 0); @@ -300,6 +299,19 @@ CardModeScale(int crtNumber, display_mode *mode) write32(regOffset + D1SCL_ENABLE, 0); write32(regOffset + D1SCL_TAP_CONTROL, 0); write32(regOffset + D1MODE_CENTER, 2); + + write32(regOffset + D1SCL_UPDATE, 0); + write32(regOffset + D1SCL_FLIP_CONTROL, 0); + + write32(regOffset + D1SCL_ENABLE, 1); + write32(regOffset + D1SCL_HVSCALE, 0x00010001); + + write32(regOffset + D1SCL_TAP_CONTROL, 0x00000101); + + write32(regOffset + D1SCL_HFILTER, 0x00030100); + write32(regOffset + D1SCL_VFILTER, 0x00030100); + + write32(regOffset + D1SCL_DITHER, 0x00001010); } diff --git a/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp b/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp index ddfec97aee..ba6d253c37 100644 --- a/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp +++ b/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp @@ -38,7 +38,7 @@ // list of supported devices const struct supported_device { uint32 device_id; - int32 chipset; + uint16 chipset; const char* name; } kSupportedDevices[] = { // R600 series (HD24xx - HD42xx) diff --git a/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp b/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp index 5e1cdbd3a8..df17dd16d7 100644 --- a/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp +++ b/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp @@ -113,21 +113,23 @@ radeon_hd_init(radeon_info &info) if (info.shared_info->device_chipset >= RADEON_R800) { // R800+ has memory stored in MB info.shared_info->graphics_memory_size - = read32(info.registers + R6XX_CONFIG_MEMSIZE) << 10; + = read32(info.registers + R6XX_CONFIG_MEMSIZE) / 1024; info.shared_info->graphics_aperture_size - = read32(info.registers + R6XX_CONFIG_APER_SIZE) << 10; + = read32(info.registers + R6XX_CONFIG_APER_SIZE) / 1024; } else { // R600-R700 has memory stored in bytes info.shared_info->graphics_memory_size - = read32(info.registers + R6XX_CONFIG_MEMSIZE) >> 10; + = read32(info.registers + R6XX_CONFIG_MEMSIZE) * 1024; info.shared_info->graphics_aperture_size - = read32(info.registers + R6XX_CONFIG_APER_SIZE) >> 10; + = read32(info.registers + R6XX_CONFIG_APER_SIZE) * 1024; } + int32 memory_size = info.shared_info->graphics_memory_size * 1024; + int32 aperture_size = info.shared_info->graphics_aperture_size * 1024; TRACE("card(%ld): found %ld MB memory on card.\n", info.id, - info.shared_info->graphics_memory_size >> 10); + memory_size); TRACE("card(%ld): found %ld MB aperture on card.\n", info.id, - info.shared_info->graphics_aperture_size >> 10); + aperture_size); // if there are more then 512MB memory on the card, only map // the aperture size to prevent overflow of gart