revert to r28339
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@30485 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -31,8 +31,6 @@
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#define TRACE dprintf
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#define TRACE dprintf
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// set this to 1 for the ata stack, or 0 for the ide stack
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// #define ATA_STACK 0
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static ide_for_controller_interface *ide;
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static ide_for_controller_interface *ide;
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static device_manager_info *pnp;
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static device_manager_info *pnp;
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@@ -190,35 +188,6 @@ ide_adapter_read_pio(ide_adapter_channel_info *channel, uint16 *data,
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static int32
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static int32
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ide_adapter_inthand(void *arg)
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ide_adapter_inthand(void *arg)
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{
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{
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#if ATA_STACK
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ide_adapter_channel_info *channel = (ide_adapter_channel_info *)arg;
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pci_device_module_info *pci = channel->pci;
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pci_device *device = channel->device;
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uint8 statusATA, statusBM;
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// this could be a spurious interrupt, so always read status
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// register unconditionally to acknowledge those
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statusATA = pci->read_io_8(device, channel->command_block_base + 7);
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if (!channel->dmaing)
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return B_UNHANDLED_INTERRUPT;
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// read bus master DMA status to test if the interrupt was
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// really generated by our controller
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statusBM = pci->read_io_8(device, channel->bus_master_base
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+ IDE_BM_STATUS_REG);
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if (statusBM & IDE_BM_STATUS_INTERRUPT) {
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// clear pending PCI bus master DMA interrupt
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_STATUS_REG,
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(statusBM & 0xf8) | IDE_BM_STATUS_INTERRUPT);
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// signal interrupt to ATA stack
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return ide->irq_handler(channel->ide_channel, statusATA);
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} else {
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return B_UNHANDLED_INTERRUPT;
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}
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#else
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ide_adapter_channel_info *channel = (ide_adapter_channel_info *)arg;
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ide_adapter_channel_info *channel = (ide_adapter_channel_info *)arg;
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pci_device_module_info *pci = channel->pci;
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pci_device_module_info *pci = channel->pci;
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pci_device *device = channel->device;
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pci_device *device = channel->device;
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@@ -237,16 +206,12 @@ ide_adapter_inthand(void *arg)
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+ IDE_BM_STATUS_REG);
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+ IDE_BM_STATUS_REG);
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if ((status & IDE_BM_STATUS_INTERRUPT) == 0)
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if ((status & IDE_BM_STATUS_INTERRUPT) == 0)
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return B_UNHANDLED_INTERRUPT;
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return B_UNHANDLED_INTERRUPT;
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// clear pending PCI bus master DMA interrupt
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_STATUS_REG,
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(status & 0xf8) | IDE_BM_STATUS_INTERRUPT);
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}
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}
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// acknowledge IRQ
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// acknowledge IRQ
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status = pci->read_io_8(device, channel->command_block_base + 7);
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status = pci->read_io_8(device, channel->command_block_base + 7);
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return ide->irq_handler(channel->ide_channel, status);
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return ide->irq_handler(channel->ide_channel, status);
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#endif
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}
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}
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@@ -306,7 +271,6 @@ ide_adapter_start_dma(ide_adapter_channel_info *channel)
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+ IDE_BM_COMMAND_REG);
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+ IDE_BM_COMMAND_REG);
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command |= IDE_BM_COMMAND_START_STOP;
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command |= IDE_BM_COMMAND_START_STOP;
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channel->dmaing = true;
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channel->dmaing = true;
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_COMMAND_REG,
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_COMMAND_REG,
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@@ -319,36 +283,6 @@ ide_adapter_start_dma(ide_adapter_channel_info *channel)
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static status_t
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static status_t
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ide_adapter_finish_dma(ide_adapter_channel_info *channel)
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ide_adapter_finish_dma(ide_adapter_channel_info *channel)
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{
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{
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#if ATA_STACK
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pci_device_module_info *pci = channel->pci;
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pci_device *device = channel->device;
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uint8 command;
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uint8 status;
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// read BM status first
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status = pci->read_io_8(device, channel->bus_master_base
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+ IDE_BM_STATUS_REG);
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// stop DMA engine, this also clears IDE_BM_STATUS_ACTIVE
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// in the BM status register
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command = pci->read_io_8(device, channel->bus_master_base
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+ IDE_BM_COMMAND_REG);
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_COMMAND_REG,
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command & ~IDE_BM_COMMAND_START_STOP);
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channel->dmaing = false;
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// reset error flag
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pci->write_io_8(device, channel->bus_master_base + IDE_BM_STATUS_REG,
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status | IDE_BM_STATUS_ERROR);
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if ((status & IDE_BM_STATUS_ACTIVE) != 0)
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return B_DEV_DATA_OVERRUN;
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if ((status & IDE_BM_STATUS_ERROR) != 0)
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return B_ERROR;
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return B_OK;
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#else
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pci_device_module_info *pci = channel->pci;
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pci_device_module_info *pci = channel->pci;
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pci_device *device = channel->device;
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pci_device *device = channel->device;
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uint8 command;
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uint8 command;
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@@ -373,9 +307,7 @@ ide_adapter_finish_dma(ide_adapter_channel_info *channel)
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if ((status & IDE_BM_STATUS_ERROR) != 0)
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if ((status & IDE_BM_STATUS_ERROR) != 0)
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return B_ERROR;
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return B_ERROR;
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/*
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// this doesn't work anymore, because the
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// interrupt handler always clears this bit now
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if ((status & IDE_BM_STATUS_INTERRUPT) == 0) {
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if ((status & IDE_BM_STATUS_INTERRUPT) == 0) {
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if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
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if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
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SHOW_ERROR0( 2, "DMA transfer aborted" );
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SHOW_ERROR0( 2, "DMA transfer aborted" );
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@@ -385,14 +317,13 @@ ide_adapter_finish_dma(ide_adapter_channel_info *channel)
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SHOW_ERROR0( 2, "DMA transfer: buffer underrun" );
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SHOW_ERROR0( 2, "DMA transfer: buffer underrun" );
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return B_DEV_DATA_UNDERRUN;
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return B_DEV_DATA_UNDERRUN;
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}
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}
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*/
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if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
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if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
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SHOW_ERROR0( 2, "DMA transfer: buffer too large" );
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SHOW_ERROR0( 2, "DMA transfer: buffer too large" );
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return B_DEV_DATA_OVERRUN;
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return B_DEV_DATA_OVERRUN;
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}
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}
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return B_OK;
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return B_OK;
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#endif
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}
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}
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@@ -483,15 +414,8 @@ ide_adapter_init_channel(device_node *node,
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}
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}
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TRACE("PCI-IDE: init channel done\n");
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TRACE("PCI-IDE: init channel done\n");
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#if ATA_STACK
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// disable interrupts
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ide_adapter_write_device_control(channel, ide_devctrl_bit3 | ide_devctrl_nien);
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#else
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// enable interrupts so the channel is ready to run
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// enable interrupts so the channel is ready to run
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ide_adapter_write_device_control(channel, ide_devctrl_bit3);
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ide_adapter_write_device_control(channel, ide_devctrl_bit3);
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#endif
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*cookie = channel;
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*cookie = channel;
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