From 599a303e2366585a8685147b23409e7d8ac983ef Mon Sep 17 00:00:00 2001
From: Augustin Cavalier <waddlesplash@gmail.com>
Date: Tue, 9 Jul 2024 11:36:50 -0400
Subject: [PATCH] PCI: Return more meaningful error codes from
 ReadConfig/WriteConfig.

---
 .../busses/pci/designware/DWPCIController.cpp    |  8 ++++----
 .../kernel/busses/pci/ecam/ECAMPCIController.cpp |  8 ++++----
 .../kernel/busses/pci/x86/X86PCIController.cpp   | 16 ++++++++--------
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/add-ons/kernel/busses/pci/designware/DWPCIController.cpp b/src/add-ons/kernel/busses/pci/designware/DWPCIController.cpp
index b478ed84f2..faa3ff0459 100644
--- a/src/add-ons/kernel/busses/pci/designware/DWPCIController.cpp
+++ b/src/add-ons/kernel/busses/pci/designware/DWPCIController.cpp
@@ -331,14 +331,14 @@ DWPCIController::ReadConfig(uint8 bus, uint8 device, uint8 function,
 
 	addr_t address = ConfigAddress(bus, device, function, offset);
 	if (address == 0)
-		return B_ERROR;
+		return ERANGE;
 
 	switch (size) {
 		case 1: value = ReadReg8(address); break;
 		case 2: value = ReadReg16(address); break;
 		case 4: value = *(vuint32*)address; break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
@@ -353,14 +353,14 @@ DWPCIController::WriteConfig(uint8 bus, uint8 device, uint8 function,
 
 	addr_t address = ConfigAddress(bus, device, function, offset);
 	if (address == 0)
-		return B_ERROR;
+		return ERANGE;
 
 	switch (size) {
 		case 1: WriteReg8(address, value); break;
 		case 2: WriteReg16(address, value); break;
 		case 4: *(vuint32*)address = value; break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
diff --git a/src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp b/src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp
index e959b67c20..88673e053b 100644
--- a/src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp
+++ b/src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp
@@ -184,14 +184,14 @@ ECAMPCIController::ReadConfig(uint8 bus, uint8 device, uint8 function,
 {
 	addr_t address = ConfigAddress(bus, device, function, offset);
 	if (address == 0)
-		return B_ERROR;
+		return ERANGE;
 
 	switch (size) {
 		case 1: value = ReadReg8(address); break;
 		case 2: value = ReadReg16(address); break;
 		case 4: value = *(vuint32*)address; break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
@@ -204,14 +204,14 @@ ECAMPCIController::WriteConfig(uint8 bus, uint8 device, uint8 function,
 {
 	addr_t address = ConfigAddress(bus, device, function, offset);
 	if (address == 0)
-		return B_ERROR;
+		return ERANGE;
 
 	switch (size) {
 		case 1: WriteReg8(address, value); break;
 		case 2: WriteReg16(address, value); break;
 		case 4: *(vuint32*)address = value; break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
diff --git a/src/add-ons/kernel/busses/pci/x86/X86PCIController.cpp b/src/add-ons/kernel/busses/pci/x86/X86PCIController.cpp
index 0941d15d23..76c471a09e 100644
--- a/src/add-ons/kernel/busses/pci/x86/X86PCIController.cpp
+++ b/src/add-ons/kernel/busses/pci/x86/X86PCIController.cpp
@@ -190,7 +190,7 @@ X86PCIControllerMeth1::ReadConfig(
 	uint16 offset, uint8 size, uint32 &value)
 {
 	if (offset > 0xff)
-		return B_BAD_VALUE;
+		return ERANGE;
 
 	InterruptsSpinLocker lock(fLock);
 	out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
@@ -205,7 +205,7 @@ X86PCIControllerMeth1::ReadConfig(
 			value = in32(PCI_MECH1_DATA_PORT);
 			break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
@@ -218,7 +218,7 @@ X86PCIControllerMeth1::WriteConfig(
 	uint16 offset, uint8 size, uint32 value)
 {
 	if (offset > 0xff)
-		return B_BAD_VALUE;
+		return ERANGE;
 
 	InterruptsSpinLocker lock(fLock);
 	out32(PCI_MECH1_REQ_DATA(bus, device, function, offset), PCI_MECH1_REQ_PORT);
@@ -233,7 +233,7 @@ X86PCIControllerMeth1::WriteConfig(
 			out32(value, PCI_MECH1_DATA_PORT);
 			break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 
 	return B_OK;
@@ -273,7 +273,7 @@ X86PCIControllerMeth2::ReadConfig(
 	uint16 offset, uint8 size, uint32 &value)
 {
 	if (offset > 0xff)
-		return B_BAD_VALUE;
+		return ERANGE;
 
 	InterruptsSpinLocker lock(fLock);
 	out8((uint8)(0xf0 | (function << 1)), PCI_MECH2_ENABLE_PORT);
@@ -289,7 +289,7 @@ X86PCIControllerMeth2::ReadConfig(
 			value = in32(PCI_MECH2_CONFIG_PORT(device, offset));
 			break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 	out8(0, PCI_MECH2_ENABLE_PORT);
 
@@ -303,7 +303,7 @@ X86PCIControllerMeth2::WriteConfig(
 	uint16 offset, uint8 size, uint32 value)
 {
 	if (offset > 0xff)
-		return B_BAD_VALUE;
+		return ERANGE;
 
 	InterruptsSpinLocker lock(fLock);
 	out8((uint8)(0xf0 | (function << 1)), PCI_MECH2_ENABLE_PORT);
@@ -319,7 +319,7 @@ X86PCIControllerMeth2::WriteConfig(
 			out32(value, PCI_MECH2_CONFIG_PORT(device, offset));
 			break;
 		default:
-			return B_ERROR;
+			return B_BAD_VALUE;
 	}
 	out8(0, PCI_MECH2_ENABLE_PORT);