From 5b3f340070c249aa4c072efa83dc26bdd91258fc Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 17 Nov 2005 13:00:03 +0000 Subject: [PATCH] updating DMA acceleration code for NV41, 43, 44. Adding code for NV47: sync to XF86, in progress (acc might be broken now..) git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14984 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/nvidia/engine/nv_acc_dma.c | 73 +++++++++++++++---- 1 file changed, 57 insertions(+), 16 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index c46ea6f5b6..7402a56bba 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -168,22 +168,63 @@ status_t nv_acc_init_dma() else { /* setup acc engine 'source' tile adressranges */ - ACCW(NV10_FBTIL0AD, 0); - ACCW(NV10_FBTIL1AD, 0); - ACCW(NV10_FBTIL2AD, 0); - ACCW(NV10_FBTIL3AD, 0); - ACCW(NV10_FBTIL4AD, 0); - ACCW(NV10_FBTIL5AD, 0); - ACCW(NV10_FBTIL6AD, 0); - ACCW(NV10_FBTIL7AD, 0); - ACCW(NV10_FBTIL0ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL1ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL2ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL3ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL4ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL5ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL6ED, (si->ps.memory_size - 1)); - ACCW(NV10_FBTIL7ED, (si->ps.memory_size - 1)); + if ((si->ps.card_type <= NV40) || (si->ps.card_type == NV45)) + { + ACCW(NV10_FBTIL0AD, 0); + ACCW(NV10_FBTIL1AD, 0); + ACCW(NV10_FBTIL2AD, 0); + ACCW(NV10_FBTIL3AD, 0); + ACCW(NV10_FBTIL4AD, 0); + ACCW(NV10_FBTIL5AD, 0); + ACCW(NV10_FBTIL6AD, 0); + ACCW(NV10_FBTIL7AD, 0); + ACCW(NV10_FBTIL0ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL1ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL2ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL3ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL4ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL5ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL6ED, (si->ps.memory_size - 1)); + ACCW(NV10_FBTIL7ED, (si->ps.memory_size - 1)); + } + else + { + /* NV41, 43, 44, 47 */ + ACCW(NV41_FBTIL0AD, 0); + ACCW(NV41_FBTIL1AD, 0); + ACCW(NV41_FBTIL2AD, 0); + ACCW(NV41_FBTIL3AD, 0); + ACCW(NV41_FBTIL4AD, 0); + ACCW(NV41_FBTIL5AD, 0); + ACCW(NV41_FBTIL6AD, 0); + ACCW(NV41_FBTIL7AD, 0); + ACCW(NV41_FBTIL8AD, 0); + ACCW(NV41_FBTIL9AD, 0); + ACCW(NV41_FBTILAAD, 0); + ACCW(NV41_FBTILBAD, 0); + ACCW(NV41_FBTIL0ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL1ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL2ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL3ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL4ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL5ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL6ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL7ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL8ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTIL9ED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTILAED, (si->ps.memory_size - 1)); + ACCW(NV41_FBTILBED, (si->ps.memory_size - 1)); + + if (si->ps.card_type == NV47) + { + ACCW(NV47_FBTILCAD, 0); + ACCW(NV47_FBTILDAD, 0); + ACCW(NV47_FBTILEAD, 0); + ACCW(NV47_FBTILCED, (si->ps.memory_size - 1)); + ACCW(NV47_FBTILDED, (si->ps.memory_size - 1)); + ACCW(NV47_FBTILEED, (si->ps.memory_size - 1)); + } + } } /*** PRAMIN ***/