From 5df1ecb2ab7a05b4f88efd579d5b2255729c3a6d Mon Sep 17 00:00:00 2001 From: Pawel Dziepak Date: Fri, 7 Mar 2014 19:27:26 +0100 Subject: [PATCH] x86_64: Relax ltr operand constraint Any 16 bit general puprose register can be a ltr operand, no need to force AX. --- src/system/kernel/arch/x86/64/descriptors.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/system/kernel/arch/x86/64/descriptors.cpp b/src/system/kernel/arch/x86/64/descriptors.cpp index 552b50d59e..b328eb28f9 100644 --- a/src/system/kernel/arch/x86/64/descriptors.cpp +++ b/src/system/kernel/arch/x86/64/descriptors.cpp @@ -34,7 +34,7 @@ static inline void load_tss(int cpu) { uint16 segment = (TSS_SEGMENT(cpu) << 3) | DPL_KERNEL; - asm volatile("ltr %w0" : : "a" (segment)); + asm volatile("ltr %w0" : : "r" (segment)); }