fixed naming fault (mn versus nm); fixed compiler warnings

git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5918 a95241bf-73f2-0310-859d-f6bbb57e9c96

src/add-ons/accelerants/neomagic/Acceleration.c

@@ -17,7 +17,7 @@ void SCREEN_TO_SCREEN_BLIT(engine_token *et, blit_params *list, uint32 count) {
 	i=0;
 	while (count--)
 	{
-		mn_acc_blit
+		nm_acc_blit
 		(
 			list[i].src_left,
 			list[i].src_top,
@@ -37,7 +37,7 @@ void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT(engine_token *et, scaled_blit_params
 	i=0;
 	while (count--)
 	{
-		mn_acc_video_blit
+		nm_acc_video_blit
 		(
 			list[i].src_left,
 			list[i].src_top,
@@ -59,7 +59,7 @@ void SCREEN_TO_SCREEN_TRANSPARENT_BLIT(engine_token *et, uint32 transparent_colo
 	i=0;
 	while (count--)
 	{
-		mn_acc_transparent_blit
+		nm_acc_transparent_blit
 		(
 			list[i].src_left,
 			list[i].src_top,
@@ -80,7 +80,7 @@ void FILL_RECTANGLE(engine_token *et, uint32 colorIndex, fill_rect_params *list,
 	i=0;
 	while (count--)
 	{
-		mn_acc_rectangle
+		nm_acc_rectangle
 		(
 			list[i].left,
 			(list[i].right)+1,
@@ -99,7 +99,7 @@ void INVERT_RECTANGLE(engine_token *et, fill_rect_params *list, uint32 count) {
 	i=0;
 	while (count--)
 	{
-		mn_acc_rectangle_invert
+		nm_acc_rectangle_invert
 		(
 			list[i].left,
 			(list[i].right)+1,
@@ -118,7 +118,7 @@ void FILL_SPAN(engine_token *et, uint32 colorIndex, uint16 *list, uint32 count)
 	i=0;
 	while (count--)
 	{
-		mn_acc_rectangle
+		nm_acc_rectangle
 		(
 			list[i+1],
 			list[i+2]+1,

src/add-ons/accelerants/neomagic/Cursor.c

@@ -25,7 +25,7 @@ status_t SET_CURSOR_SHAPE(uint16 width, uint16 height, uint16 hot_x, uint16 hot_
 	}
 	else
 	{
-		mn_crtc_cursor_define(andMask,xorMask);
+		nm_crtc_cursor_define(andMask,xorMask);
 
 		/* Update cursor variables appropriately. */
 		si->cursor.width = width;
@@ -108,7 +108,7 @@ void MOVE_CURSOR(uint16 x, uint16 y)
 	else y = 0;
 
 	/* position the cursor on the display */
-	mn_crtc_cursor_position(x,y);
+	nm_crtc_cursor_position(x,y);
 }
 
 void SHOW_CURSOR(bool is_visible) 
@@ -117,7 +117,7 @@ void SHOW_CURSOR(bool is_visible)
 	si->cursor.is_visible = is_visible;
 
 	if (is_visible)
-		mn_crtc_cursor_show();
+		nm_crtc_cursor_show();
 	else
-		mn_crtc_cursor_hide();
+		nm_crtc_cursor_hide();
 }

src/add-ons/accelerants/neomagic/EngineManagment.c

@@ -10,7 +10,7 @@
 #include "acc_std.h"
 
 
-static engine_token mn_engine_token = { 1, B_2D_ACCELERATION, NULL };
+static engine_token nm_engine_token = { 1, B_2D_ACCELERATION, NULL };
 
 uint32 ACCELERANT_ENGINE_COUNT(void) {
 	return 1;
@@ -23,7 +23,7 @@ status_t ACQUIRE_ENGINE(uint32 capabilities, uint32 max_wait, sync_token *st, en
 	if (st) SYNC_TO_TOKEN(st);
 
 	/* return an engine token */
-	*et = &mn_engine_token;
+	*et = &nm_engine_token;
 	return B_OK;
 }
 
@@ -42,7 +42,7 @@ void WAIT_ENGINE_IDLE(void) {
 	uint32 count;
 	/*wait for the engine to be totally idle*/
 	count = si->engine.count;
-	mn_acc_wait_idle();
+	nm_acc_wait_idle();
 
 	si->engine.last_idle = count;
 }

src/add-ons/accelerants/neomagic/InitAccelerant.c

@@ -13,24 +13,21 @@
 #include <unistd.h>
 #include "acc_std.h"
 
-/* defined in ProposeDisplayMode.c */
-extern status_t create_mode_list(void);
-
 static status_t init_common(int the_fd);
 
 /* Initialization code shared between primary and cloned accelerants */
 static status_t init_common(int the_fd) {
 	status_t result;
-	mn_get_private_data gpd;
+	nm_get_private_data gpd;
 	
 	// LOG not available from here to next LOG: NULL si
 
 	/* memorize the file descriptor */
 	fd = the_fd;
 	/* set the magic number so the driver knows we're for real */
-	gpd.magic = MN_PRIVATE_DATA_MAGIC;
+	gpd.magic = NM_PRIVATE_DATA_MAGIC;
 	/* contact driver and get a pointer to the registers and shared data */
-	result = ioctl(fd, MN_GET_PRIVATE_DATA, &gpd, sizeof(gpd));
+	result = ioctl(fd, NM_GET_PRIVATE_DATA, &gpd, sizeof(gpd));
 	if (result != B_OK) goto error0;
 
 	/* clone the shared area for our use */
@@ -133,7 +130,7 @@ status_t INIT_ACCELERANT(int the_fd) {
 	// LOG now available: !NULL si
 	
 	/* call the device specific init code */
-	result = mn_general_powerup();
+	result = nm_general_powerup();
 
 	/* bail out if it failed */
 	if (result != B_OK) goto error1;
@@ -192,7 +189,7 @@ status_t INIT_ACCELERANT(int the_fd) {
 	if (result != B_OK) goto error1;
 
 	/* initialise various cursor stuff*/
-	mn_crtc_cursor_init();
+	nm_crtc_cursor_init();
 
 	/* ensure cursor state */
 	SHOW_CURSOR(false);
@@ -221,7 +218,7 @@ ssize_t ACCELERANT_CLONE_INFO_SIZE(void) {
 	Since we're passing the name of the device as the only required
 	info, return the size of the name buffer
 	*/
-	return B_OS_NAME_LENGTH; // apsed, was MAX_mn_DEVICE_NAME_LENGTH;
+	return B_OS_NAME_LENGTH;
 }
 
 
@@ -230,14 +227,14 @@ Return the info required to clone the device.  void *data points to
 a buffer at least ACCELERANT_CLONE_INFO_SIZE() bytes in length.
 */
 void GET_ACCELERANT_CLONE_INFO(void *data) {
-	mn_device_name dn;
+	nm_device_name dn;
 	status_t result;
 
 	/* call the kernel driver to get the device name */	
-	dn.magic = MN_PRIVATE_DATA_MAGIC;
+	dn.magic = NM_PRIVATE_DATA_MAGIC;
 	/* store the returned info directly into the passed buffer */
 	dn.name = (char *)data;
-	result = ioctl(fd, MN_DEVICE_NAME, &dn, sizeof(dn));
+	result = ioctl(fd, NM_DEVICE_NAME, &dn, sizeof(dn));
 }
 
 /*

src/add-ons/accelerants/neomagic/Overlay.c

@@ -486,7 +486,7 @@ status_t RELEASE_OVERLAY(overlay_token ot)
 	/* call is for real */
 	{
 
-		mn_release_bes();
+		nm_release_bes();
 
 		LOG(4,("succesfull\n"));
 
@@ -553,7 +553,7 @@ status_t CONFIGURE_OVERLAY
 		{
 			LOG(4,("succesfull, switching to buffer %d\n", offset));
 
-			mn_configure_bes(ob, ow, ov, offset);
+			nm_configure_bes(ob, ow, ov, offset);
 
 			return B_OK;
 		}

src/add-ons/accelerants/neomagic/ProposeDisplayMode.c

@@ -67,6 +67,7 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 	uint8 m,n,p;
 	status_t result;
 	uint32 row_bytes, pointer_reservation;
+	bool acc_mode;
 	double target_refresh = ((double)target->timing.pixel_clock * 1000.0) /
 			(
 				(double)target->timing.h_total * 
@@ -136,7 +137,7 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 	#endif
 
 	/*find a nearby valid timing from that given*/
-	result = mn_crtc_validate_timing
+	result = nm_crtc_validate_timing
 	(
 		&target->timing.h_display, &target->timing.h_sync_start, &target->timing.h_sync_end, &target->timing.h_total,
 		&target->timing.v_display, &target->timing.v_sync_start, &target->timing.v_sync_end, &target->timing.v_total
@@ -154,7 +155,7 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 		target->virtual_height = target->timing.v_display;
 
 	/* nail virtual size and 'subsequently' calculate rowbytes */
-	result = mn_general_validate_pic_size (target, &row_bytes);
+	result = nm_general_validate_pic_size (target, &row_bytes, &acc_mode);
 	if (result == B_ERROR)
 	{
 		LOG(4, ("PROPOSEMODE: could not validate virtual picture size, aborted.\n"));
@@ -222,7 +223,7 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 
 	/* Now find the nearest valid pixelclock we actually can setup for the target mode,
 	 * this also makes sure we don't generate more pixel bandwidth than the device can handle */
-	result = mn_dac_pix_pll_find(*target,&pix_clock_found,&m,&n,&p);
+	result = nm_dac_pix_pll_find(*target,&pix_clock_found,&m,&n,&p);
 	/* update the target mode */
 	target->timing.pixel_clock = (pix_clock_found * 1000);	
 
@@ -282,6 +283,8 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 	 * mode (fixed), and all modes support DPMS (fixed);
 	 * We support scrolling and panning in every mode, so we 'send a signal' to
 	 * BWindowScreen.CanControlFrameBuffer() by setting B_SCROLL.  */
+	/* BTW: B_PARALLEL_ACCESS in combination with a hardcursor enables
+	 * BDirectWindow windowed modes. */
 	target->flags |= (B_PARALLEL_ACCESS | B_8_BIT_DAC | B_DPMS | B_SCROLL);
 
 	/* set HARDWARE_CURSOR mode if suitable */
@@ -323,7 +326,6 @@ status_t GET_MODE_LIST(display_mode *dm)
 	return B_OK;
 }
 
-
 /* Create a list of display_modes to pass back to the caller.*/
 status_t create_mode_list(void) {
 	size_t max_size;

src/add-ons/accelerants/neomagic/SetDisplayMode.c

@@ -3,7 +3,7 @@
 	This file may be used under the terms of the Be Sample Code License.
 
 	Other authors:
-	Rudolf Cornelissen 4/2003-6/2003
+	Rudolf Cornelissen 4/2003-1/2004
 */
 
 #define MODULE_BIT 0x00200000
@@ -16,13 +16,13 @@
 */
 static void interrupt_enable(bool flag) {
 	status_t result;
-	mn_set_bool_state sbs;
+	nm_set_bool_state sbs;
 
 	/* set the magic number so the driver knows we're for real */
-	sbs.magic = MN_PRIVATE_DATA_MAGIC;
+	sbs.magic = NM_PRIVATE_DATA_MAGIC;
 	sbs.do_it = flag;
 	/* contact driver and get a pointer to the registers and shared data */
-	result = ioctl(fd, MN_RUN_INTERRUPTS, &sbs, sizeof(sbs));
+	result = ioctl(fd, NM_RUN_INTERRUPTS, &sbs, sizeof(sbs));
 }
 
 /* First validate the mode, then call lots of bit banging stuff to set the mode(s)! */
@@ -47,7 +47,6 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
 
 	uint8 colour_depth = 24;
 	uint32 startadd;
-
 	bool display, h, v;
 
 	/* if internal panel is active we don't touch the CRTC timing and the pixelPLL */
@@ -75,11 +74,11 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
 	interrupt_enable(false);
 
 	/* find current DPMS state, then turn off screen(s) */
-	mn_crtc_dpms_fetch(&display, &h, &v);
+	nm_crtc_dpms_fetch(&display, &h, &v);
-	mn_crtc_dpms(false, false, false);
+	nm_crtc_dpms(false, false, false);
 
 	/*where in framebuffer the screen is (should this be dependant on previous MOVEDISPLAY?)*/
-	startadd = si->fbc.frame_buffer - si->framebuffer;
+	startadd = (uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer;
 
 	/* Perform the mode switch */
 	{
@@ -98,46 +97,44 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
 		}
 
 		/* calculate and set new mode bytes_per_row */
-		mn_general_validate_pic_size (&target, &si->fbc.bytes_per_row);
+		nm_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode);
 
 		/* set the pixelclock PLL */
 		if (crt_only)
 		{
-			status = mn_dac_set_pix_pll(target);
+			status = nm_dac_set_pix_pll(target);
 			if (status == B_ERROR)
 				LOG(8,("CRTC: error setting pixelclock\n"));
 		}
 
 		/* set the colour depth for CRTC1 and the DAC */
-		mn_dac_mode(colour_mode, 1.0);
+		nm_dac_mode(colour_mode, 1.0);
-		mn_crtc_depth(colour_mode);
+		nm_crtc_depth(colour_mode);
 		
 		/* set the display pitch */
-		mn_crtc_set_display_pitch();
+		nm_crtc_set_display_pitch();
 
 		/* tell the card what memory to display */
-		mn_crtc_set_display_start(startadd,colour_depth);
+		nm_crtc_set_display_start(startadd,colour_depth);
 
 		/* enable primary analog output */
 		//fixme: choose output connector(s)
 		
 		/* set the timing */
-		mn_crtc_set_timing(target, crt_only);
+		nm_crtc_set_timing(target, crt_only);
 
 		/* always setup centering so a KB BIOS switch to flatpanel will go OK... */
-		mn_crtc_center(target);
+		nm_crtc_center(target);
 	}
 
 	/* update driver's mode store */
 	si->dm = target;
 
 	/* turn screen on */
-	mn_crtc_dpms(display,h,v);
+	nm_crtc_dpms(display,h,v);
 
 	/* set up acceleration for this mode */
-	si->dm.virtual_height += 1;//for clipping!
+//	nm_acc_init();
-//	mn_acc_init();
-	si->dm.virtual_height -= 1;
 
 	/* log currently selected output */
 	nm_general_output_select();
@@ -207,11 +204,11 @@ status_t MOVE_DISPLAY(uint16 h_display_start, uint16 v_display_start)
 	/* actually set the registers */
 	startadd = v_display_start * si->fbc.bytes_per_row;
 	startadd += h_display_start * (colour_depth >> 3);
-	startadd += si->fbc.frame_buffer - si->framebuffer;
+	startadd += (uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer;
 
 	interrupt_enable(false);
 
-	mn_crtc_set_display_start(startadd,colour_depth);
+	nm_crtc_set_display_start(startadd,colour_depth);
 
 	interrupt_enable(true);
 	return B_OK;
@@ -237,21 +234,9 @@ void SET_INDEXED_COLORS(uint count, uint8 first, uint8 *color_data, uint32 flags
 		b[i] = *color_data++;
 		i++;	
 	}
-	mn_dac_palette(r,g,b, 256);
+	nm_dac_palette(r,g,b, 256);
 }
 
-
-/* masks for DPMS control bits */
-/*
-enum
-{
-	H_SYNC_OFF = 0x01,
-	V_SYNC_OFF = 0x02,
-	DISPLAY_OFF = 0x04,
-	BITSMASK = (H_SYNC_OFF | V_SYNC_OFF | DISPLAY_OFF)
-};
-*/
-
 /* Put the display into one of the Display Power Management modes. */
 status_t SET_DPMS_MODE(uint32 dpms_flags)
 {
@@ -262,16 +247,16 @@ status_t SET_DPMS_MODE(uint32 dpms_flags)
 	switch(dpms_flags) 
 	{
 	case B_DPMS_ON:	/* H: on, V: on */
-		mn_crtc_dpms(true, true , true);
+		nm_crtc_dpms(true, true , true);
 		break;
 	case B_DPMS_STAND_BY:
-		mn_crtc_dpms(false, false, true);
+		nm_crtc_dpms(false, false, true);
 		break;
 	case B_DPMS_SUSPEND:
-		mn_crtc_dpms(false, true, false);
+		nm_crtc_dpms(false, true, false);
 		break;
 	case B_DPMS_OFF: /* H: off, V: off, display off */
-		mn_crtc_dpms(false, false, false);
+		nm_crtc_dpms(false, false, false);
 		break;
 	default:
 		LOG(8,("SET_DPMS_MODE: Invalid DPMS settings) $%08x\n", dpms_flags));
@@ -288,14 +273,13 @@ uint32 DPMS_CAPABILITIES(void)
 	return 	(B_DPMS_ON | B_DPMS_STAND_BY | B_DPMS_SUSPEND | B_DPMS_OFF);
 }
 
-
 /* Return the current DPMS mode. */
 uint32 DPMS_MODE(void)
 {
 	bool display, h, v;
 	
 	interrupt_enable(false);
-	mn_crtc_dpms_fetch(&display, &h, &v);
+	nm_crtc_dpms_fetch(&display, &h, &v);
 	interrupt_enable(true);
 
 	if (display && h && v)

src/add-ons/accelerants/neomagic/be_driver_proto.h

@@ -47,9 +47,9 @@ status_t SYNC_TO_TOKEN(sync_token *st);
 
 void SCREEN_TO_SCREEN_BLIT(engine_token *et, blit_params *list, uint32 count);
 void SCREEN_TO_SCREEN_TRANSPARENT_BLIT(engine_token *et, uint32 transparent_colour, blit_params *list, uint32 count);
+void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT(engine_token *et, scaled_blit_params *list, uint32 count);
 void FILL_RECTANGLE(engine_token *et, uint32 color, fill_rect_params *list, uint32 count);
 void INVERT_RECTANGLE(engine_token *et, fill_rect_params *list, uint32 count);
-
 void FILL_SPAN(engine_token *et, uint32 color, uint16 *list, uint32 count);
 
 /* video_overlay */
@@ -63,4 +63,6 @@ overlay_token ALLOCATE_OVERLAY(void);
 status_t RELEASE_OVERLAY(overlay_token ot);
 status_t CONFIGURE_OVERLAY(overlay_token ot, const overlay_buffer *ob, const overlay_window *ow, const overlay_view *ov);
 
+status_t create_mode_list(void);
+
 #endif

src/add-ons/accelerants/neomagic/engine/nm_acc.c

@@ -31,7 +31,7 @@ static uint8 depth;
 	} else ACCW(YDSTLEN,((dst)<<16)|(len)); \
 } while (0)
 
-status_t mn_acc_wait_idle()
+status_t nm_acc_wait_idle()
 {
 //	volatile int i;
 //	while (ACCR(STATUS)&(1<<16))
@@ -43,7 +43,7 @@ status_t mn_acc_wait_idle()
 
 /* AFAIK this must be done for every new screenmode.
  * Engine required init. */
-status_t mn_acc_init()
+status_t nm_acc_init()
 {
 	/* used for convenience: MACCESS is a write only register! */
 	uint32 maccess = 0x00000000;
@@ -101,10 +101,10 @@ status_t mn_acc_init()
 
 	if (si->ps.card_type >= G200) {
 		/*DSTORG - location of active screen in framebuffer*/
-		ACCW(DSTORG,(si->fbc.frame_buffer)-(si->framebuffer));
+		ACCW(DSTORG,((uint8*)si->fbc.frame_buffer) - ((uint8*)si->framebuffer));
 
 		/*SRCORG - init source address - same as dest*/
-		ACCW(SRCORG,(si->fbc.frame_buffer)-(si->framebuffer));
+		ACCW(SRCORG,((uint8*)si->fbc.frame_buffer) - ((uint8*)si->framebuffer));
 	}
 
 	/* init YDSTORG - apsed, if not inited, BitBlts may fails on <= G200 */
@@ -150,7 +150,7 @@ status_t mn_acc_init()
 
 /* screen to screen blit - i.e. move windows around.
  * Engine function bitblit, paragraph 4.5.7.2 */
-status_t mn_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)
+status_t nm_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)
 {
 	uint32 t_start,t_end,offset;
 	uint32 b_start,b_end;
@@ -217,7 +217,7 @@ status_t mn_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)
 
 /* screen to screen tranparent blit - not sure what uses this.
  * Engine function bitblit, paragraph 4.5.7.2 */
-status_t mn_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h,uint32 colour)
+status_t nm_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h,uint32 colour)
 {
 	uint32 t_start,t_end,offset;
 	uint32 b_start,b_end;
@@ -288,7 +288,7 @@ status_t mn_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16
 /* rectangle fill.
  * Engine function rectangle_fill: paragraph 4.5.5.2 */
 /*colorIndex,fill_rect_params,count*/
-status_t mn_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
+status_t nm_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
 {
 /*
 	FXBNDRY - left and right coordinates    a
@@ -319,7 +319,7 @@ status_t mn_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
 /* rectangle invert.
  * Engine function rectangle_fill: paragraph 4.5.5.2 */
 /*colorIndex,fill_rect_params,count*/
-status_t mn_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
+status_t nm_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
 {
 /*
 	FXBNDRY - left and right coordinates    a
@@ -341,7 +341,7 @@ status_t mn_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32
 
 /* screen to screen scaled filtered blit - i.e. scale video in memory.
  * Engine function texture mapping for video, paragraphs 4.5.5.5 - 4.5.5.9 */
-status_t mn_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
+status_t nm_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
 	uint16 xd,uint16 yd,uint16 wd,uint16 hd)
 {
 	//fixme: implement.

src/add-ons/accelerants/neomagic/engine/nm_bes.c

@@ -8,7 +8,7 @@
 //fixme: implement: (used for virtual screens!)
 //void move_overlay(uint16 hdisp_start, uint16 vdisp_start);
 
-status_t mn_configure_bes
+status_t nm_configure_bes
 	(const overlay_buffer *ob, const overlay_window *ow, const overlay_view *ov, int offset)
 {
 	/* yuy2 (4:2:2) colorspace calculations */
@@ -27,7 +27,7 @@ status_t mn_configure_bes
 	 * displayed on screen. This is used for the 'hardware zoom' function. */
  
 	/* bes setup data */
-	mn_bes_data bi;
+	nm_bes_data bi;
 	/* misc used variables */
 	uint16 temp1, temp2;
 	/* BES output coordinate system for virtual workspaces */
@@ -573,8 +573,8 @@ status_t mn_configure_bes
 		bi.colkey_b = (ow->blue.value & ow->blue.mask);
 		bi.ob_width = ob->width;
 		/* ... and call kerneldriver to program the BES */
-		bi.magic = MN_PRIVATE_DATA_MAGIC;
+		bi.magic = NM_PRIVATE_DATA_MAGIC;
-		ioctl(fd, MN_PGM_BES, &bi, sizeof(bi));
+		ioctl(fd, NM_PGM_BES, &bi, sizeof(bi));
 	}
 
 	/* on a 500Mhz P3 CPU just logging a line costs 400uS (18-19 vcounts at 1024x768x60Hz)!
@@ -584,7 +584,7 @@ status_t mn_configure_bes
 	return B_OK;
 }
 
-status_t mn_release_bes()
+status_t nm_release_bes()
 {
 	/* setup BES control: disable scaler */
 	if (si->ps.card_type >= NM2097)

src/add-ons/accelerants/neomagic/engine/nm_crtc.c

@@ -10,7 +10,7 @@
 /* Adjust passed parameters to a valid mode line */
 //fixme: the order of the sync edges should also be checked,
 //just like the sync signal's min. pulse length...
-status_t mn_crtc_validate_timing(
+status_t nm_crtc_validate_timing(
 	uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht,
 	uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt
 )
@@ -80,7 +80,7 @@ status_t mn_crtc_validate_timing(
 }
 
 /* set a mode line */
-status_t mn_crtc_set_timing(display_mode target, bool crt_only)
+status_t nm_crtc_set_timing(display_mode target, bool crt_only)
 {
 	uint8 temp;
 
@@ -289,7 +289,7 @@ status_t mn_crtc_set_timing(display_mode target, bool crt_only)
 	return B_OK;
 }
 
-status_t mn_crtc_depth(int mode)
+status_t nm_crtc_depth(int mode)
 {
 	uint8 vid_delay = 0;
 
@@ -335,7 +335,7 @@ status_t mn_crtc_depth(int mode)
 	return B_OK;
 }
 
-status_t mn_crtc_dpms(bool display, bool h, bool v)
+status_t nm_crtc_dpms(bool display, bool h, bool v)
 {
 	uint8 temp;
 
@@ -376,7 +376,7 @@ status_t mn_crtc_dpms(bool display, bool h, bool v)
 	return B_OK;
 }
 
-status_t mn_crtc_dpms_fetch(bool * display, bool * h, bool * v)
+status_t nm_crtc_dpms_fetch(bool * display, bool * h, bool * v)
 {
 	*display = !(ISASEQR(CLKMODE) & 0x20);
 
@@ -393,7 +393,7 @@ status_t mn_crtc_dpms_fetch(bool * display, bool * h, bool * v)
 	return B_OK;
 }
 
-status_t mn_crtc_set_display_pitch() 
+status_t nm_crtc_set_display_pitch() 
 {
 	uint32 offset;
 
@@ -414,7 +414,7 @@ status_t mn_crtc_set_display_pitch()
 	return B_OK;
 }
 
-status_t mn_crtc_set_display_start(uint32 startadd,uint8 bpp) 
+status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp) 
 {
 	uint8 val;
 	uint32 timeout = 0;
@@ -458,7 +458,7 @@ status_t mn_crtc_set_display_start(uint32 startadd,uint8 bpp)
 }
 
 /* setup centering mode for current internal or simultaneous flatpanel mode */
-status_t mn_crtc_center(display_mode target)
+status_t nm_crtc_center(display_mode target)
 {
 	uint8 vcent1, vcent2, vcent3, vcent4, vcent5;
 	uint8 hcent1, hcent2, hcent3, hcent4, hcent5;
@@ -565,7 +565,7 @@ status_t mn_crtc_center(display_mode target)
 	return B_OK;
 }
 
-status_t mn_crtc_cursor_init()
+status_t nm_crtc_cursor_init()
 {
 	int i;
 	uint32 * fb;
@@ -607,12 +607,12 @@ status_t mn_crtc_cursor_init()
 	}
 
 	/* activate hardware cursor */
-	mn_crtc_cursor_show();
+	nm_crtc_cursor_show();
 
 	return B_OK;
 }
 
-status_t mn_crtc_cursor_show()
+status_t nm_crtc_cursor_show()
 {
 	if (si->ps.card_type < NM2200)
 	{
@@ -625,7 +625,7 @@ status_t mn_crtc_cursor_show()
 	return B_OK;
 }
 
-status_t mn_crtc_cursor_hide()
+status_t nm_crtc_cursor_hide()
 {
 //linux fixme: using this kills PCI(?) access sometimes, so use ISA access as below...
 /*
@@ -645,7 +645,7 @@ status_t mn_crtc_cursor_hide()
 }
 
 /*set up cursor shape*/
-status_t mn_crtc_cursor_define(uint8* andMask,uint8* xorMask)
+status_t nm_crtc_cursor_define(uint8* andMask,uint8* xorMask)
 {
 	uint8 y;
 	uint8 * cursor;
@@ -683,7 +683,7 @@ status_t mn_crtc_cursor_define(uint8* andMask,uint8* xorMask)
 }
 
 /*position the cursor*/
-status_t mn_crtc_cursor_position(uint16 x ,uint16 y)
+status_t nm_crtc_cursor_position(uint16 x ,uint16 y)
 {
 //NM2160 is ok without this, still verify the rest..:
 	/* make sure we are not in retrace, because the register(s) might get copied

src/add-ons/accelerants/neomagic/engine/nm_dac.c

@@ -8,7 +8,7 @@
 #include "nm_std.h"
 
 /*set the mode, brightness is a value from 0->2 (where 1 is equivalent to direct)*/
-status_t mn_dac_mode(int mode,float brightness)
+status_t nm_dac_mode(int mode,float brightness)
 {
 	uint8 *r, *g, *b, t[256];
 	uint16 i;
@@ -69,7 +69,7 @@ status_t mn_dac_mode(int mode,float brightness)
 		break;
 	}
 
-	if (mn_dac_palette(r, g, b, i) != B_OK) return B_ERROR;
+	if (nm_dac_palette(r, g, b, i) != B_OK) return B_ERROR;
 
 	/*set the mode - also sets VCLK dividor*/
 //	DXIW(MULCTRL, mode);
@@ -83,7 +83,7 @@ status_t mn_dac_mode(int mode,float brightness)
 }
 
 /* program the DAC palette using the given r,g,b values */
-status_t mn_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256], uint16 cnt)
+status_t nm_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256], uint16 cnt)
 {
 	int i;
 
@@ -130,7 +130,7 @@ if (1)
 /* important note:
  * PIXPLLC is used - others should be kept as is
  */
-status_t mn_dac_set_pix_pll(display_mode target)
+status_t nm_dac_set_pix_pll(display_mode target)
 {
 	uint8 m=0,n=0,p=0;
 	uint8 temp;
@@ -142,7 +142,7 @@ status_t mn_dac_set_pix_pll(display_mode target)
 	req_pclk = (target.timing.pixel_clock)/1000.0;
 	LOG(4,("DAC: Setting PIX PLL for pixelclock %f\n", req_pclk));
 
-	result = mn_dac_pix_pll_find(target,&pix_setting,&m,&n,&p);
+	result = nm_dac_pix_pll_find(target,&pix_setting,&m,&n,&p);
 	if (result != B_OK)
 	{
 		return result;
@@ -200,7 +200,7 @@ status_t mn_dac_set_pix_pll(display_mode target)
 }
 
 /* find nearest valid pix pll */
-status_t mn_dac_pix_pll_find
+status_t nm_dac_pix_pll_find
 	(display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result)
 {
 	int m = 0, n = 0, p = 0, n_max;

src/add-ons/accelerants/neomagic/engine/nm_general.c

@@ -1,5 +1,5 @@
 /* Author:
-   Rudolf Cornelissen 4/2003-8/2003
+   Rudolf Cornelissen 4/2003-1/2004
 */
 
 #define MODULE_BIT 0x00008000
@@ -7,8 +7,8 @@
 #include "nm_std.h"
 
 static status_t test_ram(void);
-static status_t nm_general_powerup (void);
+static status_t nmxxxx_general_powerup (void);
-static status_t mn_general_bios_to_powergraphics(void);
+static status_t nm_general_bios_to_powergraphics(void);
 
 static void nm_dump_configuration_space (void)
 {
@@ -43,11 +43,11 @@ static void nm_dump_configuration_space (void)
 #undef DUMP_CFG
 }
 	
-status_t mn_general_powerup()
+status_t nm_general_powerup()
 {
 	status_t status;
 
-	LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.05 running.\n"));
+	LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.06-1 running.\n"));
 
 	/* detect card type and power it up */
 	switch(CFGR(DEVID))
@@ -94,7 +94,7 @@ status_t mn_general_powerup()
 	}
 
 	/* power up the card */
-	status = nm_general_powerup();
+	status = nmxxxx_general_powerup();
 
 	/* override memory detection if requested by user */
 	if (si->settings.memory != 0)
@@ -151,8 +151,7 @@ status_t nm_set_cas_latency()
 	return B_ERROR;
 }
 
-static 
+static status_t nmxxxx_general_powerup()
-status_t nm_general_powerup()
 {
 	uint8 temp;
 //	status_t result;
@@ -185,14 +184,14 @@ status_t nm_general_powerup()
 	ISACRTCW(VGACURCTRL, 0x00);
 
 	/* if the user doesn't want a coldstart OR the BIOS pins info could not be found warmstart */
-	/*if (si->settings.usebios || (result != B_OK)) */return mn_general_bios_to_powergraphics();
+	/*if (si->settings.usebios || (result != B_OK)) */return nm_general_bios_to_powergraphics();
 
 	/*power up the PLLs,LUT,DAC*/
 	LOG(2,("INIT: powerup\n"));
 
 	/* turn off both displays and the hardcursor (also disables transfers) */
-	mn_crtc_dpms(false, false, false);
+	nm_crtc_dpms(false, false, false);
-	mn_crtc_cursor_hide();
+	nm_crtc_cursor_hide();
 
 	/* setup sequencer clocking mode */
 	ISASEQW(CLKMODE, 0x21);
@@ -268,7 +267,7 @@ status_t nm_general_powerup()
 //	VGAW_I(CRTC,0x11,0);
 
 	/* turn on display */
-	mn_crtc_dpms(true, true, true);
+	nm_crtc_dpms(true, true, true);
 
 	return B_OK;
 }
@@ -308,7 +307,7 @@ uint8 nm_general_output_read()
 }
 
 /*busy wait until retrace!*/
-status_t mn_general_wait_retrace()
+status_t nm_general_wait_retrace()
 {
 	while (!(ACCR(STATUS)&0x8));
 	return B_OK;
@@ -316,12 +315,12 @@ status_t mn_general_wait_retrace()
 
 /* basic change of card state from VGA to powergraphics -> should work from BIOS init state*/
 static 
-status_t mn_general_bios_to_powergraphics()
+status_t nm_general_bios_to_powergraphics()
 {
 	LOG(2, ("INIT: Skipping card coldstart!\n"));
 
 	/* turn off display */
-	mn_crtc_dpms(false, false, false);
+	nm_crtc_dpms(false, false, false);
 
 	/* set card to 'enhanced' mode: (only VGA standard registers used for NeoMagic cards) */
 	/* (keep) card enabled, set plain normal memory usage, no old VGA 'tricks' ... */
@@ -360,7 +359,7 @@ status_t mn_general_bios_to_powergraphics()
 	ISAGRPHW(FBSTADDE, 0x10);
 
 	/* turn on display */
-	mn_crtc_dpms(true, true, true);
+	nm_crtc_dpms(true, true, true);
 
 	return B_OK;
 }
@@ -373,7 +372,7 @@ status_t mn_general_bios_to_powergraphics()
  * acc constraints are worse than CRTC constraints.
  *
  * Mode slopspace is reflected in fbc->bytes_per_row BTW. */
-status_t mn_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row)
+status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode)
 {
 	/* Note:
 	 * This routine assumes that the CRTC memory pitch granularity is 'smaller than',
@@ -436,28 +435,28 @@ status_t mn_general_validate_pic_size (display_mode *target, uint32 *bytes_per_r
 
 	/* check if we can setup this mode with acceleration:
 	 * Max sizes need to adhere to both the acceleration engine _and_ the CRTC constraints! */
-	si->acc_mode = true;
+	*acc_mode = true;
 	/* check virtual_width */
 	switch (si->ps.card_type)
 	{
 	case G100:
 		/* acc constraint: */
-		if (target->virtual_width > 2048) si->acc_mode = false;
+		if (target->virtual_width > 2048) *acc_mode = false;
 		break;
 	default:
 		/* G200-G550 */
 		/* acc constraint: */
-		if (target->virtual_width > 4096) si->acc_mode = false;
+		if (target->virtual_width > 4096) *acc_mode = false;
 		/* for 32bit mode a lower CRTC1 restriction applies! */
 //		if ((target->space == B_RGB32_LITTLE) && (target->virtual_width > (4092 & ~acc_mask)))
-//			si->acc_mode = false;
+//			*acc_mode = false;
 		break;
 	}
 	/* virtual_height */
-	if (target->virtual_height > 2048) si->acc_mode = false;
+	if (target->virtual_height > 2048) *acc_mode = false;
 
 //fixme: (temp)
-si->acc_mode = false;
+*acc_mode = false;
 
 	/* now check virtual_size based on CRTC constraints,
 	 * making sure virtual_width stays within the 'mask' constraint: which is only
@@ -497,7 +496,7 @@ si->acc_mode = false;
 	/* OK, now we know that virtual_width is valid, and it's needing no slopspace if
 	 * it was confined above, so we can finally calculate safely if we need slopspace
 	 * for this mode... */
-	if (si->acc_mode)
+	if (*acc_mode)
 		video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask);
 	else
 		video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask);

src/add-ons/accelerants/neomagic/engine/nm_globals.c

@@ -18,17 +18,17 @@ display_mode *my_mode_list;
 area_id	my_mode_list_area;
 int accelerantIsClone;
 
-mn_get_set_pci mn_pci_access=
+nm_get_set_pci nm_pci_access=
 	{
-		MN_PRIVATE_DATA_MAGIC,
+		NM_PRIVATE_DATA_MAGIC,
 		0,
 		4,
 		0
 	};
 
-mn_in_out_isa mn_isa_access=
+nm_in_out_isa nm_isa_access=
 	{
-		MN_PRIVATE_DATA_MAGIC,
+		NM_PRIVATE_DATA_MAGIC,
 		0,
 		1,
 		0

src/add-ons/accelerants/neomagic/engine/nm_globals.h

@@ -7,6 +7,6 @@ extern display_mode *my_mode_list;
 extern area_id my_mode_list_area;
 extern int accelerantIsClone;
 
-extern mn_get_set_pci mn_pci_access;
+extern nm_get_set_pci nm_pci_access;
-extern mn_in_out_isa mn_isa_access;
+extern nm_in_out_isa nm_isa_access;
-extern mn_bes_data mn_bes_access;
+extern nm_bes_data nm_bes_access;

src/add-ons/accelerants/neomagic/engine/nm_proto.h

@@ -1,12 +1,11 @@
 /*general card functions*/
-status_t mn_general_powerup(void);
+status_t nm_general_powerup(void);
 status_t nm_set_cas_latency(void);
 status_t nm_general_output_select(void);
 uint8 nm_general_output_read(void);
-status_t mn_general_dac_select(int);
+status_t nm_general_dac_select(int);
-status_t mn_general_wait_retrace(void);
+status_t nm_general_wait_retrace(void);
-status_t mn_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row);
+status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode);
-//status_t mn_general_bios_to_powergraphics(void);
 
 /* apsed: logging macros */
 #define MSG(args) do { /* if needed or si->settings with si NULL */ \
@@ -27,48 +26,48 @@ void set_specs(void);
 void dump_specs(void);
 
 /*DAC functions*/
-status_t mn_dac_mode(int,float);
+status_t nm_dac_mode(int,float);
-status_t mn_dac_palette(uint8*,uint8*,uint8*, uint16);
+status_t nm_dac_palette(uint8*,uint8*,uint8*, uint16);
-status_t mn_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *);
+status_t nm_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *);
-status_t mn_dac_set_pix_pll(display_mode target);
+status_t nm_dac_set_pix_pll(display_mode target);
 
 /*CRTC1 functions*/
-status_t mn_crtc_validate_timing(
+status_t nm_crtc_validate_timing(
 	uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht,
 	uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt
 );
-status_t mn_crtc_set_timing(display_mode target, bool crt_only);
+status_t nm_crtc_set_timing(display_mode target, bool crt_only);
-status_t mn_crtc_depth(int mode);
+status_t nm_crtc_depth(int mode);
-status_t mn_crtc_set_display_start(uint32 startadd,uint8 bpp); 
+status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp); 
-status_t mn_crtc_set_display_pitch(void);
+status_t nm_crtc_set_display_pitch(void);
-status_t mn_crtc_center(display_mode target);
+status_t nm_crtc_center(display_mode target);
 
-status_t mn_crtc_dpms(bool, bool, bool);
+status_t nm_crtc_dpms(bool, bool, bool);
-status_t mn_crtc_dpms_fetch(bool*, bool*, bool*);
+status_t nm_crtc_dpms_fetch(bool*, bool*, bool*);
-status_t mn_crtc_mem_priority(uint8);
+status_t nm_crtc_mem_priority(uint8);
 
-status_t mn_crtc_cursor_init(void); /*Yes, cursor follows CRTC1 - not the DAC!*/
+status_t nm_crtc_cursor_init(void); /*Yes, cursor follows CRTC1 - not the DAC!*/
-status_t mn_crtc_cursor_define(uint8*,uint8*);
+status_t nm_crtc_cursor_define(uint8*,uint8*);
-status_t mn_crtc_cursor_position(uint16 x ,uint16 y);
+status_t nm_crtc_cursor_position(uint16 x ,uint16 y);
-status_t mn_crtc_cursor_show(void);
+status_t nm_crtc_cursor_show(void);
-status_t mn_crtc_cursor_hide(void);
+status_t nm_crtc_cursor_hide(void);
 
 /*acceleration functions*/
 status_t check_acc_capability(uint32 feature);
-status_t mn_acc_init(void);
+status_t nm_acc_init(void);
-status_t mn_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
+status_t nm_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
-status_t mn_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
+status_t nm_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col);
-status_t mn_acc_blit(uint16,uint16,uint16, uint16,uint16,uint16 );
+status_t nm_acc_blit(uint16,uint16,uint16, uint16,uint16,uint16 );
-status_t mn_acc_transparent_blit(uint16,uint16,uint16, uint16,uint16,uint16, uint32);
+status_t nm_acc_transparent_blit(uint16,uint16,uint16, uint16,uint16,uint16, uint32);
-status_t mn_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
+status_t nm_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
 	uint16 xd,uint16 yd,uint16 wd,uint16 hd);
-status_t mn_acc_wait_idle(void);
+status_t nm_acc_wait_idle(void);
 
 /*backend scaler functions*/
 status_t check_overlay_capability(uint32 feature);
-status_t mn_configure_bes
+status_t nm_configure_bes
 	(const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset);
-status_t mn_release_bes(void);
+status_t nm_release_bes(void);
 
 /*driver structures and enums*/
 enum{BPP8=0,BPP15=1,BPP16=2,BPP24=3};

src/add-ons/kernel/drivers/graphics/neomagic/driver.c

@@ -79,8 +79,8 @@ static status_t control_hook (void* dev, uint32 msg, void *buf, size_t len);
 static status_t map_device(device_info *di);
 static void unmap_device(device_info *di);
 static void probe_devices(void);
-static int32 mn_interrupt(void *data);
+static int32 nm_interrupt(void *data);
-void drv_program_bes_ISA(mn_bes_data *bes);
+void drv_program_bes_ISA(nm_bes_data *bes);
 
 static DeviceData		*pd;
 static pci_module_info	*pci_bus;
@@ -101,7 +101,7 @@ static device_hooks graphics_device_hooks = {
 
 #define VENDOR_ID			0x10c8	/* Neomagic inc. */
 
-static uint16 mn_device_list[] = {
+static uint16 nm_device_list[] = {
 	0x0001,	/* MagicGraph 128 (NM2070) */
 	0x0002,	/* MagicGraph 128V (NM2090)	0x42 */
 	0x0003,	/* MagicGraph 128ZV (NM2093) 0x43 */
@@ -118,7 +118,7 @@ static struct {
 	uint16	vendor;
 	uint16	*devices;
 } SupportedDevices[] = {
-	{VENDOR_ID, mn_device_list},
+	{VENDOR_ID, nm_device_list},
 	{0x0000, NULL}
 };
 
@@ -586,7 +586,7 @@ static uint32 thread_interrupt_work(int32 *flags, vuint32 *regs, vuint32 *regs2,
 }
 
 static int32
-mn_interrupt(void *data)
+nm_interrupt(void *data)
 {
 	int32 handled = B_UNHANDLED_INTERRUPT;
 	device_info *di = (device_info *)data;
@@ -701,7 +701,7 @@ static status_t open_hook (const char* name, uint32 flags, void** cookie) {
 	else
 	{
 		/* otherwise install our interrupt handler */
-		result = install_io_interrupt_handler(di->pcii.u.h0.interrupt_line, mn_interrupt, (void *)di, 0);
+		result = install_io_interrupt_handler(di->pcii.u.h0.interrupt_line, nm_interrupt, (void *)di, 0);
 		/* bail if we couldn't install the handler */
 		if (result != B_OK) goto delete_the_sem;
 	}
@@ -788,7 +788,7 @@ free_hook (void* dev) {
 	disable_vbi(regs, regs2);
 	
 	/* remove interrupt handler */
-	remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, mn_interrupt, di);
+	remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, nm_interrupt, di);
 
 	/* delete the semaphores, ignoring any errors ('cause the owning team may have died on us) */
 	delete_sem(si->vblank);
@@ -828,39 +828,39 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
 		} break;
 		
 		/* PRIVATE ioctl from here on */
-		case MN_GET_PRIVATE_DATA: {
+		case NM_GET_PRIVATE_DATA: {
-			mn_get_private_data *gpd = (mn_get_private_data *)buf;
+			nm_get_private_data *gpd = (nm_get_private_data *)buf;
-			if (gpd->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (gpd->magic == NM_PRIVATE_DATA_MAGIC) {
 				gpd->shared_info_area = di->shared_area;
 				result = B_OK;
 			}
 		} break;
-		case MN_GET_PCI: {
+		case NM_GET_PCI: {
-			mn_get_set_pci *gsp = (mn_get_set_pci *)buf;
+			nm_get_set_pci *gsp = (nm_get_set_pci *)buf;
-			if (gsp->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (gsp->magic == NM_PRIVATE_DATA_MAGIC) {
 				pci_info *pcii = &(di->pcii);
 				gsp->value = get_pci(gsp->offset, gsp->size);
 				result = B_OK;
 			}
 		} break;
-		case MN_SET_PCI: {
+		case NM_SET_PCI: {
-			mn_get_set_pci *gsp = (mn_get_set_pci *)buf;
+			nm_get_set_pci *gsp = (nm_get_set_pci *)buf;
-			if (gsp->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (gsp->magic == NM_PRIVATE_DATA_MAGIC) {
 				pci_info *pcii = &(di->pcii);
 				set_pci(gsp->offset, gsp->size, gsp->value);
 				result = B_OK;
 			}
 		} break;
-		case MN_DEVICE_NAME: {
+		case NM_DEVICE_NAME: {
-			mn_device_name *dn = (mn_device_name *)buf;
+			nm_device_name *dn = (nm_device_name *)buf;
-			if (dn->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (dn->magic == NM_PRIVATE_DATA_MAGIC) {
 				strcpy(dn->name, di->name);
 				result = B_OK;
 			}
 		} break;
-		case MN_RUN_INTERRUPTS: {
+		case NM_RUN_INTERRUPTS: {
-			mn_set_bool_state *ri = (mn_set_bool_state *)buf;
+			nm_set_bool_state *ri = (nm_set_bool_state *)buf;
-			if (ri->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (ri->magic == NM_PRIVATE_DATA_MAGIC) {
 				vuint32 *regs = di->regs;
 				vuint32 *regs2 = di->regs2;
 				if (ri->do_it) {
@@ -871,9 +871,9 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
 				result = B_OK;
 			}
 		} break;
-		case MN_ISA_OUT: {
+		case NM_ISA_OUT: {
-			mn_in_out_isa *io_isa = (mn_in_out_isa *)buf;
+			nm_in_out_isa *io_isa = (nm_in_out_isa *)buf;
-			if (io_isa->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (io_isa->magic == NM_PRIVATE_DATA_MAGIC) {
 				if (io_isa->size == 1)
   					isa_bus->write_io_8(io_isa->adress, (uint8)io_isa->data);
    				else
@@ -881,9 +881,9 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
   				result = B_OK;
    			}
 		} break;
-		case MN_ISA_IN: {
+		case NM_ISA_IN: {
-			mn_in_out_isa *io_isa = (mn_in_out_isa *)buf;
+			nm_in_out_isa *io_isa = (nm_in_out_isa *)buf;
-			if (io_isa->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (io_isa->magic == NM_PRIVATE_DATA_MAGIC) {
 				if (io_isa->size == 1)
 	   				io_isa->data = isa_bus->read_io_8(io_isa->adress);
 	   			else
@@ -891,9 +891,9 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
    				result = B_OK;
    			}
 		} break;
-		case MN_PGM_BES: {
+		case NM_PGM_BES: {
-			mn_bes_data *bes_isa = (mn_bes_data *)buf;
+			nm_bes_data *bes_isa = (nm_bes_data *)buf;
-			if (bes_isa->magic == MN_PRIVATE_DATA_MAGIC) {
+			if (bes_isa->magic == NM_PRIVATE_DATA_MAGIC) {
 				drv_program_bes_ISA(bes_isa);
   				result = B_OK;
    			}
@@ -902,7 +902,7 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
 	return result;
 }
 
-void drv_program_bes_ISA(mn_bes_data *bes)
+void drv_program_bes_ISA(nm_bes_data *bes)
 {
 	uint8 temp;