Change all references to "__INTEL__" to "__i386__".
They are functionally identical, but the former is a BeOS/Haiku-specfic macro that we include in the compiler specs, and the latter is defined by GCC.
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@@ -18,7 +18,7 @@
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__HAIKU_BIG_ENDIAN - defined to 1 on big endian architectures
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(defaults to undefined)
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*/
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#if defined(__INTEL__)
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#if defined(__i386__)
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# define __HAIKU_ARCH x86
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# if __GNUC__ == 2
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# define __HAIKU_ARCH_ABI "x86_gcc2"
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@@ -534,7 +534,7 @@ extern status_t get_cpu_info(uint32 firstCPU, uint32 cpuCount,
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extern status_t get_cpu_topology_info(cpu_topology_node_info* topologyInfos,
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uint32* topologyInfoCount);
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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typedef union {
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struct {
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uint32 max_eax;
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@@ -24,7 +24,7 @@
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#if defined(__x86_64__)
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typedef struct x86_64_debug_cpu_state debug_cpu_state;
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#elif defined(__INTEL__)
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#elif defined(__i386__)
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typedef struct x86_debug_cpu_state debug_cpu_state;
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#elif defined(__POWERPC__)
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typedef struct ppc_debug_cpu_state debug_cpu_state;
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@@ -23,7 +23,7 @@ extern "C" {
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extern int32 tls_allocate(void);
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#if !_NO_INLINE_ASM && __INTEL__ && __GNUC__
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#if !_NO_INLINE_ASM && __i386__ && __GNUC__
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static inline void *
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tls_get(int32 index)
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@@ -54,13 +54,13 @@ tls_set(int32 index, void *value)
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: : "r" (index), "r" (value));
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}
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#else /* !_NO_INLINE_ASM && __INTEL__ && __GNUC__ */
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#else /* !_NO_INLINE_ASM && __i386__ && __GNUC__ */
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extern void *tls_get(int32 index);
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extern void **tls_address(int32 index);
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extern void tls_set(int32 index, void *value);
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#endif /* !_NO_INLINE_ASM && __INTEL__ && __GNUC__ */
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#endif /* !_NO_INLINE_ASM && __i386__ && __GNUC__ */
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#ifdef __cplusplus
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}
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@@ -10,7 +10,7 @@
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* Architecture-specific structure passed to signal handlers
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*/
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#if __INTEL__
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#if __i386__
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typedef struct packed_fp_stack {
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unsigned char st0[10];
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@@ -146,6 +146,6 @@ struct vregs {
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unsigned long ebx;
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};
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#endif /* __INTEL__ */
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#endif /* __i386__ */
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#endif /* _ARCH_SIGNAL_H_ */
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@@ -1,7 +1,7 @@
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#ifndef _FENV_H
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#define _FENV_H
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#if defined(__INTEL__)
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#if defined(__i386__)
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# include <arch/x86/fenv.h>
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#elif defined(__x86_64__)
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# include <arch/x86_64/fenv.h>
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@@ -49,7 +49,7 @@ check_r5_compatibility()
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if (!__gR5Compatibility)
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return false;
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#ifndef __INTEL__
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#ifndef __i386__
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return false;
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#else
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@@ -31,7 +31,7 @@ int32 get_rounded_cpu_speed(void);
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#endif
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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/*! Tries to parse an Intel CPU ID string to match our usual naming scheme.
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Note, this function is not thread safe, and must only be called once
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at a time.
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@@ -182,7 +182,7 @@ get_cpu_vendor_string(enum cpu_vendor cpuVendor)
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}
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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/*! Parameter 'name' needs to point to an allocated array of 49 characters. */
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void
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get_cpuid_model_string(char *name)
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@@ -237,21 +237,21 @@ get_cpuid_model_string(char *name)
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}
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}
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}
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#endif /* __INTEL__ || __x86_64__ */
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#endif /* __i386__ || __x86_64__ */
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static const char*
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get_cpu_model_string(enum cpu_platform platform, enum cpu_vendor cpuVendor,
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uint32 cpuModel)
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{
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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char cpuidName[49];
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#endif
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(void)cpuVendor;
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(void)cpuModel;
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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if (platform != B_CPU_x86 && platform != B_CPU_x86_64)
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return NULL;
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@@ -549,7 +549,7 @@ extern void _kern_clear_caches(void *address, size_t length,
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extern bool _kern_cpu_enabled(int32 cpu);
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extern status_t _kern_set_cpu_enabled(int32 cpu, bool enabled);
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#if defined(__INTEL__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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// our only x86 only syscall
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extern status_t _kern_get_cpuid(cpuid_info *info, uint32 eax, uint32 cpu);
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#endif
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