diff --git a/src/add-ons/accelerants/via/SetDisplayMode.c b/src/add-ons/accelerants/via/SetDisplayMode.c index af68e6a022..135d1998a3 100644 --- a/src/add-ons/accelerants/via/SetDisplayMode.c +++ b/src/add-ons/accelerants/via/SetDisplayMode.c @@ -154,22 +154,22 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set) { case B_CMAP8: colour_depth1 = 8; -// head1_mode(BPP8, 1.0); + head1_mode(BPP8, 1.0); head1_depth(BPP8); break; case B_RGB15_LITTLE: colour_depth1 = 16; -// head1_mode(BPP15, 1.0); + head1_mode(BPP15, 1.0); head1_depth(BPP15); break; case B_RGB16_LITTLE: colour_depth1 = 16; -// head1_mode(BPP16, 1.0); + head1_mode(BPP16, 1.0); head1_depth(BPP16); break; case B_RGB32_LITTLE: colour_depth1 = 32; -// head1_mode(BPP32, 1.0); + head1_mode(BPP32, 1.0); head1_depth(BPP32); break; } @@ -288,7 +288,7 @@ status = B_OK; /* first set the colordepth */ head1_depth(colour_mode); /* then(!) program the PAL (<8bit colordepth does not support 8bit PAL) */ -// head1_mode(colour_mode,1.0); + head1_mode(colour_mode,1.0); /* set the display pitch */ head1_set_display_pitch(); @@ -432,8 +432,8 @@ void SET_INDEXED_COLORS(uint count, uint8 first, uint8 *color_data, uint32 flags b[i]=*color_data++; i++; } -// head1_palette(r,g,b); - if (si->dm.flags & DUALHEAD_BITS) head2_palette(r,g,b); + head1_palette(r,g,b); +// if (si->dm.flags & DUALHEAD_BITS) head2_palette(r,g,b); } /* Put the display into one of the Display Power Management modes. */ diff --git a/src/add-ons/accelerants/via/engine/crtc.c b/src/add-ons/accelerants/via/engine/crtc.c index 1510b61925..5e59a90590 100644 --- a/src/add-ons/accelerants/via/engine/crtc.c +++ b/src/add-ons/accelerants/via/engine/crtc.c @@ -423,27 +423,41 @@ status_t eng_crtc_depth(int mode) uint8 genctrl = 0; /* set VCLK scaling */ + /* genctrl bit use: + b7: ? + b6: ? + b5: ? + b4: %0 = 15-bit color in 2 bytes/pixel mode; + %1 = 16-bit color in 2 bytes/pixel mode. + b3-2:%00 = 1 byte /pixel; + %01 = 2 bytes/pixel; + %10 = 3 bytes/pixel; (assumed) + %11 = 4 bytes/pixel. + b1: %0 = 4 bits/pixel; + %1 = b3-2 scheme above. + b0: ? + */ switch(mode) { case BPP8: - /* bits unknown (yet): 'direct mode' */ + /* indexed mode */ genctrl = 0x22; //%0010 0010 break; case BPP15: - /* bits unknown (yet): 'indirect mode' (via colorpalette?) */ - genctrl = 0xb6; //%1011 0110 + /* direct mode */ + genctrl = 0xa6; //%1010 0110 break; case BPP16: - /* bits unknown (yet): 'indirect mode' (via colorpalette?) */ + /* direct mode */ genctrl = 0xb6; //%1011 0110 break; case BPP24: - /* bits unknown (yet): 'indirect mode' (via colorpalette?) */ - //fixme: unknown what to set yet.. - genctrl = 0x00; + /* direct mode */ + //fixme: complete guess.. + genctrl = 0x0a; //%0000 1010 break; case BPP32: - /* bits unknown (yet): 'indirect mode' (via colorpalette?) */ + /* direct mode */ genctrl = 0xae; //%1010 1110 break; } diff --git a/src/add-ons/accelerants/via/engine/dac.c b/src/add-ons/accelerants/via/engine/dac.c index bc02be69fa..d210df6e1d 100644 --- a/src/add-ons/accelerants/via/engine/dac.c +++ b/src/add-ons/accelerants/via/engine/dac.c @@ -1,6 +1,6 @@ /* program the DAC */ /* Author: - Rudolf Cornelissen 12/2003-10/2004 + Rudolf Cornelissen 12/2003-7/2005 */ #define MODULE_BIT 0x00010000 @@ -66,6 +66,9 @@ status_t eng_dac_mode(int mode,float brightness) uint8 *r,*g,*b; int i, ri; + /* 8-bit mode uses the palette differently */ + if (mode == BPP8) return B_ERROR; + /*set colour arrays to point to space reserved in shared info*/ r = si->color_data; g = r + 256; @@ -94,9 +97,14 @@ status_t eng_dac_mode(int mode,float brightness) status_t eng_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]) { int i; - LOG(4,("DAC: setting palette\n")); + /* enable primary head palette access */ + SEQW(MMIO_EN, ((SEQR(MMIO_EN)) & 0xfe)); + /* ??? */ + SEQW(0x1b, ((SEQR(0x1b)) | 0x20)); + /* disable gamma correction HW mode */ + SEQW(FIFOWM, ((SEQR(FIFOWM)) & 0x7f)); /* select first PAL adress before starting programming */ ENG_REG8(RG8_PALINDW) = 0x00; @@ -104,9 +112,9 @@ status_t eng_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]) for (i = 0; i < 256; i++) { /* the 6 implemented bits are on b0-b5 of the bus */ - ENG_REG8(RG8_PALDATA) = r[i]; - ENG_REG8(RG8_PALDATA) = g[i]; - ENG_REG8(RG8_PALDATA) = b[i]; + ENG_REG8(RG8_PALDATA) = (r[i] >> 2); + ENG_REG8(RG8_PALDATA) = (g[i] >> 2); + ENG_REG8(RG8_PALDATA) = (b[i] >> 2); } if (ENG_REG8(RG8_PALINDW) != 0x00) { @@ -121,10 +129,11 @@ if (1) ENG_REG8(RG8_PALINDR) = 0x00; for (i = 0; i < 256; i++) { - R = ENG_REG8(RG8_PALDATA); - G = ENG_REG8(RG8_PALDATA); - B = ENG_REG8(RG8_PALDATA); - if ((r[i] != R) || (g[i] != G) || (b[i] != B)) + R = (ENG_REG8(RG8_PALDATA) << 2); + G = (ENG_REG8(RG8_PALDATA) << 2); + B = (ENG_REG8(RG8_PALDATA) << 2); + /* only compare the most significant 6 bits */ + if (((r[i] & 0xfc) != R) || ((g[i] & 0xfc) != G) || ((b[i] & 0xfc) != B)) LOG(1,("DAC palette %d: w %x %x %x, r %x %x %x\n", i, r[i], g[i], b[i], R, G, B)); // apsed } } diff --git a/src/add-ons/accelerants/via/engine/general.c b/src/add-ons/accelerants/via/engine/general.c index 71c07d9cba..76cf589553 100644 --- a/src/add-ons/accelerants/via/engine/general.c +++ b/src/add-ons/accelerants/via/engine/general.c @@ -90,7 +90,7 @@ status_t eng_general_powerup() { status_t status; - LOG(1,("POWERUP: Haiku VIA Accelerant 0.03 running.\n")); + LOG(1,("POWERUP: Haiku VIA Accelerant 0.04 running.\n")); /* preset no laptop */ si->ps.laptop = false;