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Add one-off gpio corrections on dce 3 and dce 4 chipsets

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This commit is contained in:
Alexander von Gluck IV
2011-11-13 09:51:26 -06:00
parent f37821851e
commit 681be5be60
1 changed files with 21 additions and 2 deletions
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src/add-ons/accelerants/radeon_hd/gpu.cpp
+21 -2
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@@ -653,6 +653,8 @@ radeon_gpu_i2c_attach(uint32 id, uint8 hw_line)
status_t status_t
radeon_gpu_gpio_setup() radeon_gpu_gpio_setup()
{ {
radeon_shared_info &info = *gInfo->shared_info;
int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info); int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info);
uint8 tableMajor; uint8 tableMajor;
@@ -683,8 +685,25 @@ radeon_gpu_gpio_setup()
for (uint32 i = 0; i < numIndices; i++) { for (uint32 i = 0; i < numIndices; i++) {
ATOM_GPIO_I2C_ASSIGMENT *gpio = &i2c_info->asGPIO_Info[i]; ATOM_GPIO_I2C_ASSIGMENT *gpio = &i2c_info->asGPIO_Info[i];
// TODO: if DCE 4 and i == 7 ... manual override for evergreen if (info.dceMajor >= 3) {
// TODO: if DCE 3 and i == 4 ... manual override if (i == 4 && B_LENDIAN_TO_HOST_INT16(gpio->usClkMaskRegisterIndex)
== 0x1fda && gpio->sucI2cId.ucAccess == 0x94) {
gpio->sucI2cId.ucAccess = 0x14;
TRACE("%s: BUG: GPIO override for DCE 3 occured\n", __func__);
}
}
if (info.dceMajor >= 4) {
if (i == 7 && B_LENDIAN_TO_HOST_INT16(gpio->usClkMaskRegisterIndex)
== 0x1936 && gpio->sucI2cId.ucAccess == 0) {
gpio->sucI2cId.ucAccess = 0x97;
gpio->ucDataMaskShift = 8;
gpio->ucDataEnShift = 8;
gpio->ucDataY_Shift = 8;
gpio->ucDataA_Shift = 8;
TRACE("%s: BUG: GPIO override for DCE 4 occured\n", __func__);
}
}
// populate gpio information // populate gpio information
gGPIOInfo[i]->hw_line gGPIOInfo[i]->hw_line