diff --git a/src/add-ons/accelerants/radeon_hd/accelerant.h b/src/add-ons/accelerants/radeon_hd/accelerant.h
index 01ad458e59..98184a9c28 100644
--- a/src/add-ons/accelerants/radeon_hd/accelerant.h
+++ b/src/add-ons/accelerants/radeon_hd/accelerant.h
@@ -156,7 +156,7 @@ typedef struct {
 
 typedef struct {
 	bool			active;
-	uint32			connector_index; // matches connector id in connector_info
+	uint32			connectorIndex; // matches connector id in connector_info
 	register_info	*regs;
 	bool			found_ranges;
 	uint32			vfreq_max;
diff --git a/src/add-ons/accelerants/radeon_hd/display.cpp b/src/add-ons/accelerants/radeon_hd/display.cpp
index 2aa0576d94..dbff0c288e 100644
--- a/src/add-ons/accelerants/radeon_hd/display.cpp
+++ b/src/add-ons/accelerants/radeon_hd/display.cpp
@@ -370,10 +370,10 @@ detect_connectors()
 	TRACE("%s: found %" B_PRIu8 " potential display paths.\n", __func__,
 		path_obj->ucNumOfDispPath);
 
-	uint32 connector_index = 0;
+	uint32 connectorIndex = 0;
 	for (i = 0; i < path_obj->ucNumOfDispPath; i++) {
 
-		if (connector_index >= ATOM_MAX_SUPPORTED_DEVICE)
+		if (connectorIndex >= ATOM_MAX_SUPPORTED_DEVICE)
 			continue;
 
 		uint8 *addr = (uint8*)path_obj->asDispPath;
@@ -463,11 +463,11 @@ detect_connectors()
 								record = (ATOM_COMMON_RECORD_HEADER *)
 									((char *)record + record->ucRecordSize);
 							}
-							uint32 encoder_id = (encoder_obj & OBJECT_ID_MASK)
+							uint32 encoderID = (encoder_obj & OBJECT_ID_MASK)
 								>> OBJECT_ID_SHIFT;
 
 							uint32 encoder_type = VIDEO_ENCODER_NONE;
-							switch(encoder_id) {
+							switch(encoderID) {
 								case ENCODER_OBJECT_ID_INTERNAL_LVDS:
 								case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
 								case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
@@ -541,13 +541,13 @@ detect_connectors()
 								"%s\n", __func__, i,
 								get_encoder_name(encoder_type));
 
-							gConnector[connector_index]->encoder.flags
+							gConnector[connectorIndex]->encoder.flags
 								= connector_flags;
-							gConnector[connector_index]->encoder.valid
+							gConnector[connectorIndex]->encoder.valid
 								= true;
-							gConnector[connector_index]->encoder.object_id
-								= encoder_id;
-							gConnector[connector_index]->encoder.type
+							gConnector[connectorIndex]->encoder.object_id
+								= encoderID;
+							gConnector[connectorIndex]->encoder.type
 								= encoder_type;
 						}
 					}
@@ -584,7 +584,7 @@ detect_connectors()
 										= (ATOM_I2C_ID_CONFIG_ACCESS *)
 										&i2c_record->sucI2cId;
 									// attach i2c gpio information for connector
-									radeon_gpu_i2c_attach(connector_index,
+									radeon_gpu_i2c_attach(connectorIndex,
 										i2c_config->ucAccess);
 									break;
 								case ATOM_HPD_INT_RECORD_TYPE:
@@ -607,28 +607,28 @@ detect_connectors()
 				__func__, i, get_connector_name(connector_type),
 				connector_type);
 
-			gConnector[connector_index]->valid = true;
-			gConnector[connector_index]->flags = connector_flags;
-			gConnector[connector_index]->type = connector_type;
-			gConnector[connector_index]->object_id
+			gConnector[connectorIndex]->valid = true;
+			gConnector[connectorIndex]->flags = connector_flags;
+			gConnector[connectorIndex]->type = connector_type;
+			gConnector[connectorIndex]->object_id
 				= connector_object_id;
 
-			gConnector[connector_index]->encoder.is_tv = false;
-			gConnector[connector_index]->encoder.is_hdmi = false;
+			gConnector[connectorIndex]->encoder.is_tv = false;
+			gConnector[connectorIndex]->encoder.is_hdmi = false;
 
 			switch(connector_type) {
 				case VIDEO_CONNECTOR_COMPOSITE:
 				case VIDEO_CONNECTOR_SVIDEO:
 				case VIDEO_CONNECTOR_9DIN:
-					gConnector[connector_index]->encoder.is_tv = true;
+					gConnector[connectorIndex]->encoder.is_tv = true;
 					break;
 				case VIDEO_CONNECTOR_HDMIA:
 				case VIDEO_CONNECTOR_HDMIB:
-					gConnector[connector_index]->encoder.is_hdmi = true;
+					gConnector[connectorIndex]->encoder.is_hdmi = true;
 					break;
 			}
 
-			connector_index++;
+			connectorIndex++;
 		} // END for each valid connector
 	} // end for each display path
 
@@ -658,7 +658,7 @@ detect_displays()
 		if (radeon_gpu_read_edid(id, &gDisplay[displayIndex]->edid_info)) {
 			gDisplay[displayIndex]->active = true;
 				// set this display as active
-			gDisplay[displayIndex]->connector_index = id;
+			gDisplay[displayIndex]->connectorIndex = id;
 				// set physical connector index from gConnector
 
 			init_registers(gDisplay[displayIndex]->regs, displayIndex);
@@ -678,7 +678,7 @@ detect_displays()
 			if (gConnector[id]->encoder.type == VIDEO_ENCODER_TVDAC)
 				continue;
 			gDisplay[0]->active = true;
-			gDisplay[0]->connector_index = id;
+			gDisplay[0]->connectorIndex = id;
 			init_registers(gDisplay[0]->regs, 0);
 			if (detect_crt_ranges(0) == B_OK)
 				gDisplay[0]->found_ranges = true;
@@ -699,11 +699,11 @@ debug_displays()
 		ERROR("Display #%" B_PRIu32 " active = %s\n",
 			id, gDisplay[id]->active ? "true" : "false");
 
-		uint32 connector_index = gDisplay[id]->connector_index;
+		uint32 connectorIndex = gDisplay[id]->connectorIndex;
 
 		if (gDisplay[id]->active) {
-			uint32 connector_type = gConnector[connector_index]->type;
-			uint32 encoder_type = gConnector[connector_index]->encoder.type;
+			uint32 connector_type = gConnector[connectorIndex]->type;
+			uint32 encoder_type = gConnector[connectorIndex]->encoder.type;
 			ERROR(" + connector: %s\n", get_connector_name(connector_type));
 			ERROR(" + encoder:   %s\n", get_encoder_name(encoder_type));
 
@@ -742,15 +742,15 @@ debug_connectors()
 
 
 uint32
-display_get_encoder_mode(uint32 connector_index)
+display_get_encoder_mode(uint32 connectorIndex)
 {
-	uint32 connector_type = gConnector[connector_index]->type;
+	uint32 connector_type = gConnector[connectorIndex]->type;
 	switch (connector_type) {
 		case VIDEO_CONNECTOR_DVII:
 		case VIDEO_CONNECTOR_HDMIB: /* HDMI-B is DL-DVI; analog works fine */
 			// TODO : if audio detected on edid and DCE4, ATOM_ENCODER_MODE_DVI
 			//        if audio detected on edid not DCE4, ATOM_ENCODER_MODE_HDMI
-			// if (gConnector[connector_index]->use_digital)
+			// if (gConnector[connectorIndex]->use_digital)
 			//	return ATOM_ENCODER_MODE_DVI;
 			// else
 				return ATOM_ENCODER_MODE_CRT;
@@ -786,7 +786,7 @@ display_get_encoder_mode(uint32 connector_index)
 
 
 void
-display_crtc_lock(uint8 crtc_id, int command)
+display_crtc_lock(uint8 crtcID, int command)
 {
 	TRACE("%s\n", __func__);
 	ENABLE_CRTC_PS_ALLOCATION args;
@@ -795,7 +795,7 @@ display_crtc_lock(uint8 crtc_id, int command)
 
 	memset(&args, 0, sizeof(args));
 
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 	args.ucEnable = command;
 
 	atom_execute_table(gAtomContext, index, (uint32*)&args);
@@ -803,7 +803,7 @@ display_crtc_lock(uint8 crtc_id, int command)
 
 
 void
-display_crtc_blank(uint8 crtc_id, int command)
+display_crtc_blank(uint8 crtcID, int command)
 {
 	TRACE("%s\n", __func__);
 	BLANK_CRTC_PS_ALLOCATION args;
@@ -811,7 +811,7 @@ display_crtc_blank(uint8 crtc_id, int command)
 
 	memset(&args, 0, sizeof(args));
 
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 	args.ucBlanking = command;
 
 	atom_execute_table(gAtomContext, index, (uint32 *)&args);
@@ -819,7 +819,7 @@ display_crtc_blank(uint8 crtc_id, int command)
 
 
 void
-display_crtc_scale(uint8 crtc_id, display_mode *mode)
+display_crtc_scale(uint8 crtcID, display_mode *mode)
 {
 	TRACE("%s\n", __func__);
 	ENABLE_SCALER_PS_ALLOCATION args;
@@ -827,7 +827,7 @@ display_crtc_scale(uint8 crtc_id, display_mode *mode)
 
 	memset(&args, 0, sizeof(args));
 
-	args.ucScaler = crtc_id;
+	args.ucScaler = crtcID;
 	args.ucEnable = ATOM_SCALER_EXPANSION;
 
 	atom_execute_table(gAtomContext, index, (uint32 *)&args);
@@ -835,10 +835,10 @@ display_crtc_scale(uint8 crtc_id, display_mode *mode)
 
 
 void
-display_crtc_fb_set_dce1(uint8 crtc_id, display_mode *mode)
+display_crtc_fb_set_dce1(uint8 crtcID, display_mode *mode)
 {
 	radeon_shared_info &info = *gInfo->shared_info;
-	register_info* regs = gDisplay[crtc_id]->regs;
+	register_info* regs = gDisplay[crtcID]->regs;
 
 	uint32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE;
 	uint32 fb_format;
@@ -936,7 +936,7 @@ display_crtc_fb_set_dce1(uint8 crtc_id, display_mode *mode)
 
 
 void
-display_crtc_set(uint8 crtc_id, display_mode *mode)
+display_crtc_set(uint8 crtcID, display_mode *mode)
 {
 	display_timing& displayTiming = mode->timing;
 
@@ -972,14 +972,14 @@ display_crtc_set(uint8 crtc_id, display_mode *mode)
 		misc |= ATOM_VSYNC_POLARITY;
 
 	args.susModeMiscInfo.usAccess = B_HOST_TO_LENDIAN_INT16(misc);
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 
 	atom_execute_table(gAtomContext, index, (uint32 *)&args);
 }
 
 
 void
-display_crtc_set_dtd(uint8 crtc_id, display_mode *mode)
+display_crtc_set_dtd(uint8 crtcID, display_mode *mode)
 {
 	display_timing& displayTiming = mode->timing;
 
@@ -1023,14 +1023,14 @@ display_crtc_set_dtd(uint8 crtc_id, display_mode *mode)
 		misc |= ATOM_VSYNC_POLARITY;
 
 	args.susModeMiscInfo.usAccess = B_HOST_TO_LENDIAN_INT16(misc);
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 
 	atom_execute_table(gAtomContext, index, (uint32 *)&args);
 }
 
 
 void
-display_crtc_power(uint8 crtc_id, int command)
+display_crtc_power(uint8 crtcID, int command)
 {
 	TRACE("%s\n", __func__);
 	int index = GetIndexIntoMasterTable(COMMAND, EnableCRTC);
@@ -1038,7 +1038,7 @@ display_crtc_power(uint8 crtc_id, int command)
 
 	memset(&args, 0, sizeof(args));
 
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 	args.ucEnable = command;
 
 	atom_execute_table(gAtomContext, index, (uint32*)&args);
@@ -1046,7 +1046,7 @@ display_crtc_power(uint8 crtc_id, int command)
 
 
 void
-display_crtc_memreq(uint8 crtc_id, int command)
+display_crtc_memreq(uint8 crtcID, int command)
 {
 	TRACE("%s\n", __func__);
 	int index = GetIndexIntoMasterTable(COMMAND, EnableCRTCMemReq);
@@ -1054,7 +1054,7 @@ display_crtc_memreq(uint8 crtc_id, int command)
 
 	memset(&args, 0, sizeof(args));
 
-	args.ucCRTC = crtc_id;
+	args.ucCRTC = crtcID;
 	args.ucEnable = command;
 
 	atom_execute_table(gAtomContext, index, (uint32*)&args);
diff --git a/src/add-ons/accelerants/radeon_hd/display.h b/src/add-ons/accelerants/radeon_hd/display.h
index 37540ed4b8..a000a97989 100644
--- a/src/add-ons/accelerants/radeon_hd/display.h
+++ b/src/add-ons/accelerants/radeon_hd/display.h
@@ -65,15 +65,15 @@ status_t detect_displays();
 void debug_displays();
 void debug_connectors();
 
-uint32 display_get_encoder_mode(uint32 connector_index);
-void display_crtc_lock(uint8 crtc_id, int command);
-void display_crtc_blank(uint8 crtc_id, int command);
-void display_crtc_scale(uint8 crtc_id, display_mode *mode);
-void display_crtc_fb_set_dce1(uint8 crtc_id, display_mode *mode);
-void display_crtc_set(uint8 crtc_id, display_mode *mode);
-void display_crtc_set_dtd(uint8 crtc_id, display_mode *mode);
-void display_crtc_power(uint8 crtc_id, int command);
-void display_crtc_memreq(uint8 crtc_id, int command);
+uint32 display_get_encoder_mode(uint32 connectorIndex);
+void display_crtc_lock(uint8 crtcID, int command);
+void display_crtc_blank(uint8 crtcID, int command);
+void display_crtc_scale(uint8 crtcID, display_mode *mode);
+void display_crtc_fb_set_dce1(uint8 crtcID, display_mode *mode);
+void display_crtc_set(uint8 crtcID, display_mode *mode);
+void display_crtc_set_dtd(uint8 crtcID, display_mode *mode);
+void display_crtc_power(uint8 crtcID, int command);
+void display_crtc_memreq(uint8 crtcID, int command);
 
 
 #endif /* RADEON_HD_DISPLAY_H */
diff --git a/src/add-ons/accelerants/radeon_hd/encoder.cpp b/src/add-ons/accelerants/radeon_hd/encoder.cpp
index a82d554daf..f4abc06257 100644
--- a/src/add-ons/accelerants/radeon_hd/encoder.cpp
+++ b/src/add-ons/accelerants/radeon_hd/encoder.cpp
@@ -37,7 +37,7 @@ union crtc_source_param {
 
 
 void
-encoder_assign_crtc(uint8 crtc_id)
+encoder_assign_crtc(uint8 crtcID)
 {
 	int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
 	union crtc_source_param args;
@@ -50,23 +50,23 @@ encoder_assign_crtc(uint8 crtc_id)
 		!= B_OK)
 		return;
 
-	uint16 connector_index = gDisplay[crtc_id]->connector_index;
-	uint16 encoder_id = gConnector[connector_index]->encoder.object_id;
+	uint16 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	uint16 encoderID = gConnector[connectorIndex]->encoder.object_id;
 
 	switch (frev) {
 		case 1:
 			switch (crev) {
 				case 1:
 				default:
-					args.v1.ucCRTC = crtc_id;
-					switch (encoder_id) {
+					args.v1.ucCRTC = crtcID;
+					switch (encoderID) {
 						case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
 						case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
 							args.v1.ucDevice = ATOM_DEVICE_DFP1_INDEX;
 							break;
 						case ENCODER_OBJECT_ID_INTERNAL_LVDS:
 						case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-							if ((gConnector[connector_index]->flags
+							if ((gConnector[connectorIndex]->flags
 								& ATOM_DEVICE_LCD1_SUPPORT) != 0)
 								args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX;
 							else
@@ -102,10 +102,10 @@ encoder_assign_crtc(uint8 crtc_id)
 					}
 					break;
 				case 2:
-					args.v2.ucCRTC = crtc_id;
+					args.v2.ucCRTC = crtcID;
 					args.v2.ucEncodeMode
-						= display_get_encoder_mode(connector_index);
-					switch (encoder_id) {
+						= display_get_encoder_mode(connectorIndex);
+					switch (encoderID) {
 						case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 						case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
 						case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
@@ -169,16 +169,16 @@ encoder_assign_crtc(uint8 crtc_id)
 	atom_execute_table(gAtomContext, index, (uint32*)&args);
 
 	// update crtc encoder scratch register @ scratch 3
-	encoder_crtc_scratch(crtc_id);
+	encoder_crtc_scratch(crtcID);
 }
 
 
 void
 encoder_mode_set(uint8 id, uint32 pixelClock)
 {
-	uint32 connector_index = gDisplay[id]->connector_index;
+	uint32 connectorIndex = gDisplay[id]->connectorIndex;
 
-	switch (gConnector[connector_index]->encoder.object_id) {
+	switch (gConnector[connectorIndex]->encoder.object_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_DAC1:
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
 		case ENCODER_OBJECT_ID_INTERNAL_DAC2:
@@ -220,15 +220,15 @@ encoder_digital_setup(uint8 id, uint32 pixelClock, int command)
 {
 	TRACE("%s\n", __func__);
 
-	uint32 connector_index = gDisplay[id]->connector_index;
+	uint32 connectorIndex = gDisplay[id]->connectorIndex;
 
 	union lvds_encoder_control args;
 	memset(&args, 0, sizeof(args));
 
 	int index = 0;
-	uint16 connector_flags = gConnector[connector_index]->encoder.flags;
+	uint16 connector_flags = gConnector[connectorIndex]->encoder.flags;
 
-	switch (gConnector[connector_index]->encoder.object_id) {
+	switch (gConnector[connectorIndex]->encoder.object_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_LVDS:
 			index = GetIndexIntoMasterTable(COMMAND, LVDSEncoderControl);
 			break;
@@ -338,13 +338,13 @@ encoder_analog_setup(uint8 id, uint32 pixelClock, int command)
 {
 	TRACE("%s\n", __func__);
 
-	uint32 connector_index = gDisplay[id]->connector_index;
+	uint32 connectorIndex = gDisplay[id]->connectorIndex;
 
 	int index = 0;
 	DAC_ENCODER_CONTROL_PS_ALLOCATION args;
 	memset(&args, 0, sizeof(args));
 
-	switch (gConnector[connector_index]->encoder.object_id) {
+	switch (gConnector[connectorIndex]->encoder.object_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_DAC1:
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
 			index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl);
@@ -367,47 +367,47 @@ encoder_analog_setup(uint8 id, uint32 pixelClock, int command)
 
 
 void
-encoder_crtc_scratch(uint8 crtc_id)
+encoder_crtc_scratch(uint8 crtcID)
 {
 	TRACE("%s\n", __func__);
 
-	uint32 connector_index = gDisplay[crtc_id]->connector_index;
-	uint32 encoder_flags = gConnector[connector_index]->encoder.flags;
+	uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	uint32 encoderFlags = gConnector[connectorIndex]->encoder.flags;
 
 	// TODO : r500
 	uint32 bios_3_scratch = Read32(OUT, R600_BIOS_3_SCRATCH);
 
-	if ((encoder_flags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 18);
+		bios_3_scratch |= (crtcID << 18);
 	}
-	if ((encoder_flags & ATOM_DEVICE_CV_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CV_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 24);
+		bios_3_scratch |= (crtcID << 24);
 	}
-	if ((encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 16);
+		bios_3_scratch |= (crtcID << 16);
 	}
-	if ((encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 20);
+		bios_3_scratch |= (crtcID << 20);
 	}
-	if ((encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 17);
+		bios_3_scratch |= (crtcID << 17);
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 19);
+		bios_3_scratch |= (crtcID << 19);
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 23);
+		bios_3_scratch |= (crtcID << 23);
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
 		bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE;
-		bios_3_scratch |= (crtc_id << 25);
+		bios_3_scratch |= (crtcID << 25);
 	}
 
 	// TODO : r500
@@ -416,71 +416,71 @@ encoder_crtc_scratch(uint8 crtc_id)
 
 
 void
-encoder_dpms_scratch(uint8 crtc_id, bool power)
+encoder_dpms_scratch(uint8 crtcID, bool power)
 {
 	TRACE("%s: power: %s\n", __func__, power ? "true" : "false");
 
-	uint32 connector_index = gDisplay[crtc_id]->connector_index;
-	uint32 encoder_flags = gConnector[connector_index]->encoder.flags;
+	uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	uint32 encoderFlags = gConnector[connectorIndex]->encoder.flags;
 
 	// TODO : r500
 	uint32 bios_2_scratch = Read32(OUT, R600_BIOS_2_SCRATCH);
 
-	if ((encoder_flags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_CV_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CV_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_CV_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP4_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP4_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE;
 		else
 			bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE;
 	}
-	if ((encoder_flags & ATOM_DEVICE_DFP5_SUPPORT) != 0) {
+	if ((encoderFlags & ATOM_DEVICE_DFP5_SUPPORT) != 0) {
 		if (power == true)
 			bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE;
 		else
@@ -491,17 +491,17 @@ encoder_dpms_scratch(uint8 crtc_id, bool power)
 
 
 void
-encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
+encoder_dpms_set(uint8 crtcID, uint8 encoderID, int mode)
 {
 	int index = 0;
 	DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
 
 	memset(&args, 0, sizeof(args));
 
-	uint32 connector_index = gDisplay[crtc_id]->connector_index;
-	uint32 encoder_flags = gConnector[connector_index]->encoder.flags;
+	uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	uint32 encoderFlags = gConnector[connectorIndex]->encoder.flags;
 
-	switch (encoder_id) {
+	switch (encoderID) {
 		case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
 			index = GetIndexIntoMasterTable(COMMAND, TMDSAOutputControl);
@@ -527,7 +527,7 @@ encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
 			index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
 			break;
 		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-			if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0)
+			if ((encoderFlags & ATOM_DEVICE_LCD_SUPPORT) != 0)
 				index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
 			else
 				index = GetIndexIntoMasterTable(COMMAND, LVTMAOutputControl);
@@ -556,22 +556,22 @@ encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
 		case B_DPMS_ON:
 			args.ucAction = ATOM_ENABLE;
 			atom_execute_table(gAtomContext, index, (uint32*)&args);
-			if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
+			if ((encoderFlags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
 				args.ucAction = ATOM_LCD_BLON;
 				atom_execute_table(gAtomContext, index, (uint32*)&args);
 			}
-			encoder_dpms_scratch(crtc_id, true);
+			encoder_dpms_scratch(crtcID, true);
 			break;
 		case B_DPMS_STAND_BY:
 		case B_DPMS_SUSPEND:
 		case B_DPMS_OFF:
 			args.ucAction = ATOM_DISABLE;
 			atom_execute_table(gAtomContext, index, (uint32*)&args);
-			if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
+			if ((encoderFlags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
 				args.ucAction = ATOM_LCD_BLOFF;
 				atom_execute_table(gAtomContext, index, (uint32*)&args);
 			}
-			encoder_dpms_scratch(crtc_id, false);
+			encoder_dpms_scratch(crtcID, false);
 			break;
 	}
 }
diff --git a/src/add-ons/accelerants/radeon_hd/encoder.h b/src/add-ons/accelerants/radeon_hd/encoder.h
index 093225fb23..9389320e39 100644
--- a/src/add-ons/accelerants/radeon_hd/encoder.h
+++ b/src/add-ons/accelerants/radeon_hd/encoder.h
@@ -14,9 +14,9 @@ void encoder_mode_set(uint8 id, uint32 pixelClock);
 status_t encoder_digital_setup(uint8 id, uint32 pixelClock, int command);
 status_t encoder_analog_setup(uint8 id, uint32 pixelClock, int command);
 void encoder_output_lock(bool lock);
-void encoder_crtc_scratch(uint8 crtc_id);
-void encoder_dpms_scratch(uint8 crtc_id, bool power);
-void encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode);
+void encoder_crtc_scratch(uint8 crtcID);
+void encoder_dpms_scratch(uint8 crtcID, bool power);
+void encoder_dpms_set(uint8 crtcID, uint8 encoderID, int mode);
 
 
 #endif /* RADEON_HD_ENCODER_H */
diff --git a/src/add-ons/accelerants/radeon_hd/mode.cpp b/src/add-ons/accelerants/radeon_hd/mode.cpp
index 6763b603f4..07a0367ddc 100644
--- a/src/add-ons/accelerants/radeon_hd/mode.cpp
+++ b/src/add-ons/accelerants/radeon_hd/mode.cpp
@@ -158,11 +158,11 @@ radeon_set_display_mode(display_mode *mode)
 		if (gDisplay[id]->active == false)
 			continue;
 
-		uint16 connector_index = gDisplay[id]->connector_index;
+		uint16 connectorIndex = gDisplay[id]->connectorIndex;
 
 		// *** encoder prep
 		encoder_output_lock(true);
-		encoder_dpms_set(id, gConnector[connector_index]->encoder.object_id,
+		encoder_dpms_set(id, gConnector[connectorIndex]->encoder.object_id,
 			B_DPMS_OFF);
 		encoder_assign_crtc(id);
 
@@ -193,7 +193,7 @@ radeon_set_display_mode(display_mode *mode)
 		display_crtc_lock(id, ATOM_DISABLE);
 
 		// *** encoder commit
-		encoder_dpms_set(id, gConnector[connector_index]->encoder.object_id,
+		encoder_dpms_set(id, gConnector[connectorIndex]->encoder.object_id,
 			B_DPMS_ON);
 		encoder_output_lock(false);
 	}
diff --git a/src/add-ons/accelerants/radeon_hd/pll.cpp b/src/add-ons/accelerants/radeon_hd/pll.cpp
index 1be68ad14b..0ab1cd1004 100644
--- a/src/add-ons/accelerants/radeon_hd/pll.cpp
+++ b/src/add-ons/accelerants/radeon_hd/pll.cpp
@@ -171,7 +171,7 @@ union adjust_pixel_clock {
 
 
 uint32
-pll_adjust(pll_info *pll, uint8 crtc_id)
+pll_adjust(pll_info *pll, uint8 crtcID)
 {
 	pll->flags |= PLL_PREFER_LOW_REF_DIV;
 
@@ -181,9 +181,9 @@ pll_adjust(pll_info *pll, uint8 crtc_id)
 	uint32 pixelClock = pll->pixel_clock;
 	uint32 adjustedClock = pll->pixel_clock;
 
-	uint32 connector_index = gDisplay[crtc_id]->connector_index;
-	uint32 encoder_id = gConnector[connector_index]->encoder.object_id;
-	uint32 encoder_mode = display_get_encoder_mode(connector_index);
+	uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	uint32 encoderID = gConnector[connectorIndex]->encoder.object_id;
+	uint32 encoder_mode = display_get_encoder_mode(connectorIndex);
 
 	if (info.device_chipset >= (RADEON_R600 | 0x20)) {
 		union adjust_pixel_clock args;
@@ -203,7 +203,7 @@ pll_adjust(pll_info *pll, uint8 crtc_id)
 					case 2:
 						args.v1.usPixelClock
 							= B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
-						args.v1.ucTransmitterID = encoder_id;
+						args.v1.ucTransmitterID = encoderID;
 						args.v1.ucEncodeMode = encoder_mode;
 						// TODO : SS and SS % > 0
 						if (0) {
@@ -220,7 +220,7 @@ pll_adjust(pll_info *pll, uint8 crtc_id)
 					case 3:
 						args.v3.sInput.usPixelClock
 							= B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
-						args.v3.sInput.ucTransmitterID = encoder_id;
+						args.v3.sInput.ucTransmitterID = encoderID;
 						args.v3.sInput.ucEncodeMode = encoder_mode;
 						args.v3.sInput.ucDispPllConfig = 0;
 						// TODO : SS and SS % > 0
@@ -263,16 +263,16 @@ pll_adjust(pll_info *pll, uint8 crtc_id)
 
 
 status_t
-pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
+pll_set(uint8 pllID, uint32 pixelClock, uint8 crtcID)
 {
-	uint32 connector_index = gDisplay[crtc_id]->connector_index;
-	pll_info *pll = &gConnector[connector_index]->encoder.pll;
+	uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
+	pll_info *pll = &gConnector[connectorIndex]->encoder.pll;
 
 	pll->pixel_clock = pixelClock;
-	pll->id = pll_id;
+	pll->id = pllID;
 
 	// get any needed clock adjustments, set reference/post dividers, set flags
-	uint32 adjustedClock = pll_adjust(pll, crtc_id);
+	uint32 adjustedClock = pll_adjust(pll, crtcID);
 
 	// compute dividers, set flags
 	pll_compute(pll);
@@ -297,7 +297,7 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
 			args.v1.ucFracFbDiv = pll->feedback_div_frac;
 			args.v1.ucPostDiv = pll->post_div;
 			args.v1.ucPpll = pll->id;
-			args.v1.ucCRTC = crtc_id;
+			args.v1.ucCRTC = crtcID;
 			args.v1.ucRefDivSrc = 1;
 			break;
 		case 2:
@@ -307,7 +307,7 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
 			args.v2.ucFracFbDiv = pll->feedback_div_frac;
 			args.v2.ucPostDiv = pll->post_div;
 			args.v2.ucPpll = pll->id;
-			args.v2.ucCRTC = crtc_id;
+			args.v2.ucCRTC = crtcID;
 			args.v2.ucRefDivSrc = 1;
 			break;
 		case 3:
@@ -321,11 +321,11 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
 			// if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))
 			// 	args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;
 			args.v3.ucTransmitterId
-				= gConnector[connector_index]->encoder.object_id;
-			args.v3.ucEncoderMode = display_get_encoder_mode(connector_index);
+				= gConnector[connectorIndex]->encoder.object_id;
+			args.v3.ucEncoderMode = display_get_encoder_mode(connectorIndex);
 			break;
 		case 5:
-			args.v5.ucCRTC = crtc_id;
+			args.v5.ucCRTC = crtcID;
 			args.v5.usPixelClock = B_HOST_TO_LENDIAN_INT16(adjustedClock / 10);
 			args.v5.ucRefDiv = pll->reference_div;
 			args.v5.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedback_div);
@@ -345,14 +345,14 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
 					break;
 			}
 			args.v5.ucTransmitterID
-				= gConnector[connector_index]->encoder.object_id;
+				= gConnector[connectorIndex]->encoder.object_id;
 			args.v5.ucEncoderMode
-				= display_get_encoder_mode(connector_index);
-			args.v5.ucPpll = pll_id;
+				= display_get_encoder_mode(connectorIndex);
+			args.v5.ucPpll = pllID;
 			break;
 		case 6:
 			args.v6.ulDispEngClkFreq
-				= B_HOST_TO_LENDIAN_INT32(crtc_id << 24 | adjustedClock / 10);
+				= B_HOST_TO_LENDIAN_INT32(crtcID << 24 | adjustedClock / 10);
 			args.v6.ucRefDiv = pll->reference_div;
 			args.v6.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedback_div);
 			args.v6.ulFbDivDecFrac
@@ -377,9 +377,9 @@ pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id)
 					break;
 			}
 			args.v6.ucTransmitterID
-				= gConnector[connector_index]->encoder.object_id;
-			args.v6.ucEncoderMode = display_get_encoder_mode(connector_index);
-			args.v6.ucPpll = pll_id;
+				= gConnector[connectorIndex]->encoder.object_id;
+			args.v6.ucEncoderMode = display_get_encoder_mode(connectorIndex);
+			args.v6.ucPpll = pllID;
 			break;
 		default:
 			TRACE("%s: ERROR: table version %d.%d TODO\n", __func__,
diff --git a/src/add-ons/accelerants/radeon_hd/pll.h b/src/add-ons/accelerants/radeon_hd/pll.h
index 3c0b7ff11e..b0650df479 100644
--- a/src/add-ons/accelerants/radeon_hd/pll.h
+++ b/src/add-ons/accelerants/radeon_hd/pll.h
@@ -87,9 +87,9 @@ struct pll_info {
 };
 
 
-uint32 pll_adjust(pll_info *pll, uint8 crtc_id);
+uint32 pll_adjust(pll_info *pll, uint8 crtcID);
 status_t pll_compute(pll_info *pll);
-status_t pll_set(uint8 pll_id, uint32 pixelClock, uint8 crtc_id);
+status_t pll_set(uint8 pllID, uint32 pixelClock, uint8 crtcID);
 
 
 #endif /* RADEON_HD_PLL_H */