First steps to DIG encoder support

* add function to pick the DIG encoder to use
* uncomment DIG encoder setting code
This commit is contained in:
Alexander von Gluck IV
2011-12-13 13:03:41 -06:00
parent 80f3c7fcf9
commit 6b120e4c65
2 changed files with 72 additions and 25 deletions
+69 -24
View File
@@ -113,30 +113,32 @@ encoder_assign_crtc(uint8 crtcID)
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
ERROR("%s: DIG encoder not yet supported!\n", switch (encoder_pick_dig(crtcID)) {
__func__); case 0:
//dig = radeon_encoder->enc_priv; args.v2.ucEncoderID
//switch (dig->dig_encoder) { = ASIC_INT_DIG1_ENCODER_ID;
// case 0: break;
// args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; case 1:
// break; args.v2.ucEncoderID
// case 1: = ASIC_INT_DIG2_ENCODER_ID;
// args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; break;
// break; case 2:
// case 2: args.v2.ucEncoderID
// args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; = ASIC_INT_DIG3_ENCODER_ID;
// break; break;
// case 3: case 3:
// args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; args.v2.ucEncoderID
// break; = ASIC_INT_DIG4_ENCODER_ID;
// case 4: break;
// args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; case 4:
// break; args.v2.ucEncoderID
// case 5: = ASIC_INT_DIG5_ENCODER_ID;
// args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; break;
// break; case 5:
//} args.v2.ucEncoderID
break; = ASIC_INT_DIG6_ENCODER_ID;
break;
}
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
break; break;
@@ -175,6 +177,49 @@ encoder_assign_crtc(uint8 crtcID)
} }
uint32
encoder_pick_dig(uint8 crtcID)
{
TRACE("%s\n", __func__);
radeon_shared_info &info = *gInfo->shared_info;
uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
uint32 encoderID = gConnector[connectorIndex]->encoder.objectID;
// TODO: we assume link a for now
uint8 linkID = 0;
if (info.dceMajor >= 4) {
switch (info.chipsetID) {
case RADEON_PALM:
return linkID;
case RADEON_SUMO:
case RADEON_SUMO2:
// llano follows dce 3.2
return crtcID;
}
switch (encoderID) {
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
return linkID ? 1 : 0;
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
return linkID ? 3 : 2;
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
return linkID ? 5 : 4;
}
ERROR("%s: picking DIG encoder on non-DIG dce 4+ encoder!\n", __func__);
} else if ((info.dceMajor >= 3) && (info.dceMinor >= 2)) {
// DCE 3.2 can drive any DIG encoder
return crtcID;
}
if (encoderID == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA) {
// LVTMA can only be driven by DIG encoder 2
return 1;
}
return 0;
}
void void
encoder_apply_quirks(uint8 crtcID) encoder_apply_quirks(uint8 crtcID)
{ {
+3 -1
View File
@@ -12,7 +12,9 @@
#include <SupportDefs.h> #include <SupportDefs.h>
void encoder_assign_crtc(uint8 crtID); void encoder_assign_crtc(uint8 crtcID);
uint32 encoder_pick_dig(uint8 crtcID);
void encoder_apply_quirks(uint8 crtcID); void encoder_apply_quirks(uint8 crtcID);
void encoder_mode_set(uint8 id, uint32 pixelClock); void encoder_mode_set(uint8 id, uint32 pixelClock);
status_t encoder_analog_setup(uint32 connectorIndex, status_t encoder_analog_setup(uint32 connectorIndex,