updates needed to detect early AGP1.0 no-feature devices, and abort on PCI nVidia cards
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8290 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -1,5 +1,9 @@
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/* Author:
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/* Author:
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Rudolf Cornelissen 6/2004
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Rudolf Cornelissen 6/2004-7/2004
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Note:
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This stuff will probably be relocated to the AGP busmanager module later on,
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but for now we have something to test with...
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*/
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*/
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#define MODULE_BIT 0x00000100
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#define MODULE_BIT 0x00000100
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@@ -8,6 +12,10 @@
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#include "nv_std.h"
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#include "nv_std.h"
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static void nv_agp_list_caps(agp_info ai);
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static void nv_agp_list_caps(agp_info ai);
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static bool has_AGP_interface(agp_info *ai_card, uint8 *adress);
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#define PCI_CFGR(A) (nv_pci_access.offset = A, ioctl(fd,NV_GET_PCI, &nv_pci_access, sizeof(nv_pci_access)), nv_pci_access.value)
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#define PCI_CFGW(A,B) (nv_pci_access.offset = A, nv_pci_access.value = B, ioctl(fd,NV_SET_PCI,&nv_pci_access,sizeof(nv_pci_access)))
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status_t nv_agp_setup(void)
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status_t nv_agp_setup(void)
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{
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{
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@@ -15,14 +23,19 @@ status_t nv_agp_setup(void)
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int agp_fd;
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int agp_fd;
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agp_info ai_card, ai_bridge;
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agp_info ai_card, ai_bridge;
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uint8 rq_depth_card, rq_depth_bridge;
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uint8 rq_depth_card, rq_depth_bridge;
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uint8 adress;
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/* check for card's AGP capabilities and list them */
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/* check for card's AGP capabilities - see PCI specification */
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ai_card.config.agp_cap_id = CFGR(AGPREF);
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/* Note:
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ai_card.config.agp_stat = CFGR(AGPSTAT);
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* We have to iterate through the capability list as specified in the PCI spec,
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ai_card.config.agp_cmd = CFGR(AGPCMD);
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* otherwise we cannot distinquish between nVidia PCI and AGP cards!
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* (PCI cards still have AGP registers that pretend to support AGP) */
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if ((ai_card.config.agp_cap_id & 0x00ff0000) && ((ai_card.config.agp_cap_id & AGP_id_mask) == AGP_id))
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if (!(has_AGP_interface(&ai_card, &adress)))
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{
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{
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LOG(4,("AGP: graphicscard is PCI type.\n"));
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return B_ERROR;
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}
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LOG(4,("AGP: graphicscard is AGP type, supporting specification %d.%d;\n",
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LOG(4,("AGP: graphicscard is AGP type, supporting specification %d.%d;\n",
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((ai_card.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
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((ai_card.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
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((ai_card.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
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((ai_card.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
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@@ -37,7 +50,7 @@ status_t nv_agp_setup(void)
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{
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{
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LOG(4,("AGP: cannot open AGP host bridge driver, aborting!\n"));
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LOG(4,("AGP: cannot open AGP host bridge driver, aborting!\n"));
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/* program card for PCI access */
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/* program card for PCI access */
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CFGW(AGPCMD, 0x00000000);
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PCI_CFGW((adress + 8), 0x00000000);
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return B_ERROR;
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return B_ERROR;
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}
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}
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@@ -53,7 +66,7 @@ status_t nv_agp_setup(void)
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/* close host bridge driver */
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/* close host bridge driver */
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close(agp_fd);
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close(agp_fd);
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/* program card for PCI access */
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/* program card for PCI access */
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CFGW(AGPCMD, 0x00000000);
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PCI_CFGW((adress + 8), 0x00000000);
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return B_ERROR;
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return B_ERROR;
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}
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}
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@@ -72,9 +85,24 @@ status_t nv_agp_setup(void)
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/* close host bridge driver */
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/* close host bridge driver */
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close(agp_fd);
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close(agp_fd);
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/* program card for PCI access */
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/* program card for PCI access */
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CFGW(AGPCMD, 0x00000000);
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PCI_CFGW((adress + 8), 0x00000000);
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return B_OK;
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return B_ERROR;
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}
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/* find out if AGP modes are supported: devices exist that have the AGP style
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* connector with AGP style registers, but not the features!
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* (confirmed Matrox Millenium II AGP for instance) */
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if (!(ai_card.config.agp_stat & AGP_rates) ||
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!(ai_bridge.config.agp_stat & AGP_rates))
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{
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LOG(4,("AGP: no AGP modes possible, aborting AGP setup!\n"));
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/* close host bridge driver */
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close(agp_fd);
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/* program card for PCI access */
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PCI_CFGW((adress + 8), 0x00000000);
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return B_ERROR;
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}
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}
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/* find out shared AGP capabilities of card and host bridge */
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/* find out shared AGP capabilities of card and host bridge */
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@@ -85,7 +113,7 @@ status_t nv_agp_setup(void)
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/* close host bridge driver */
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/* close host bridge driver */
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close(agp_fd);
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close(agp_fd);
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/* program card for PCI access */
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/* program card for PCI access */
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CFGW(AGPCMD, 0x00000000);
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PCI_CFGW((adress + 8), 0x00000000);
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return B_ERROR;
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return B_ERROR;
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}
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}
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@@ -188,17 +216,14 @@ status_t nv_agp_setup(void)
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/* note:
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/* note:
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* the AGP standard defines that the host bridge should be enabled first. */
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* the AGP standard defines that the host bridge should be enabled first. */
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ioctl(agp_fd, SET_CONFIG, &ai_bridge);
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ioctl(agp_fd, SET_CONFIG, &ai_bridge);
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CFGW(AGPCMD, ai_card.config.agp_cmd);
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PCI_CFGW((adress + 8), ai_card.config.agp_cmd);
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LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));
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LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));
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/* close host bridge driver */
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/* close host bridge driver */
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close(agp_fd);
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close(agp_fd);
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}
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else
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return B_OK;
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{
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LOG(4,("AGP: graphicscard is PCI type.\n"));
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}
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}
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}
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static void nv_agp_list_caps(agp_info ai)
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static void nv_agp_list_caps(agp_info ai)
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@@ -282,3 +307,43 @@ static void nv_agp_list_caps(agp_info ai)
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else
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else
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LOG(4,("AGP: this AGP interface is currently disabled.\n"));
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LOG(4,("AGP: this AGP interface is currently disabled.\n"));
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}
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}
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static bool has_AGP_interface(agp_info *ai_card, uint8 *adress)
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{
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bool has_AGP = false;
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/* check if device implements a list of capabilities */
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if (CFGR(DEVCTRL) & 0x00100000)
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{
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uint32 item;
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uint8 item_adress;
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/* get pointer to PCI capabilities list */
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item_adress = CFGR(CFG_0) & 0x000000ff;
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/* read first item from list */
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item = PCI_CFGR(item_adress);
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while ((item & AGP_next_ptr) && ((item & AGP_id_mask) != AGP_id))
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{
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/* read next item from list */
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item_adress = ((item & AGP_next_ptr) >> AGP_next_ptr_shift);
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item = PCI_CFGR(item_adress);
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}
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if ((item & AGP_id_mask) == AGP_id)
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{
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/* we found the AGP interface! */
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has_AGP = true;
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/* return the adress if the interface */
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*adress = item_adress;
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/* readout the AGP interface capabilities and settings */
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ai_card->config.agp_cap_id = PCI_CFGR(item_adress);
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ai_card->config.agp_stat = PCI_CFGR(item_adress + 4);
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ai_card->config.agp_cmd = PCI_CFGR(item_adress + 8);
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}
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}
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return has_AGP;
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}
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#undef PCI_CFGR
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#undef PCI_CFGW
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