U-Boot mmu: Style cleanup, no functional change

This commit is contained in:
Alexander von Gluck IV
2012-05-18 06:36:52 -05:00
parent 268816a3ce
commit 6d4270e3ce
+17 -12
View File
@@ -41,6 +41,7 @@
#ifdef __ARM__ #ifdef __ARM__
/* /*
TODO: TODO:
-recycle bit! -recycle bit!
@@ -61,18 +62,18 @@ TODO:
*/ */
/* /*
*defines a block in memory *defines a block in memory
*/ */
struct memblock { struct memblock {
const char name[16]; // the name will be used for debugging etc later perhaps... const char name[16];
addr_t start; // start of the block // the name will be used for debugging etc later perhaps...
addr_t end; // end of the block addr_t start;
uint32 flags; // which flags should be applied (device/normal etc..) // start of the block
addr_t end;
// end of the block
uint32 flags;
// which flags should be applied (device/normal etc..)
}; };
@@ -96,7 +97,7 @@ static struct memblock LOADER_MEMORYMAP[] = {
MMU_L2_FLAG_C, MMU_L2_FLAG_C,
}, },
{ {
"RAM_free",//16MB free RAM (actually more but we don't identity map it automaticaly) "RAM_free", // 16MB free RAM (more but we don't map it automaticaly)
SDRAM_BASE + 0x0200000, SDRAM_BASE + 0x0200000,
SDRAM_BASE + 0x11FFFFF, SDRAM_BASE + 0x11FFFFF,
MMU_L2_FLAG_C, MMU_L2_FLAG_C,
@@ -124,7 +125,9 @@ static struct memblock LOADER_MEMORYMAP[] = {
#endif #endif
}; };
//static const uint32 kDefaultPageTableFlags = MMU_FLAG_READWRITE; // not cached not buffered, R/W
//static const uint32 kDefaultPageTableFlags = MMU_FLAG_READWRITE;
// not cached not buffered, R/W
static const size_t kMaxKernelSize = 0x200000; // 2 MB for the kernel static const size_t kMaxKernelSize = 0x200000; // 2 MB for the kernel
static addr_t sNextPhysicalAddress = 0; //will be set by mmu_init static addr_t sNextPhysicalAddress = 0; //will be set by mmu_init
@@ -198,7 +201,8 @@ void
mmu_set_TTBR(uint32 ttb) mmu_set_TTBR(uint32 ttb)
{ {
ttb &= 0xffffc000; ttb &= 0xffffc000;
asm volatile( "MCR p15, 0, %[adr], c2, c0, 0"::[adr] "r" (ttb) ); /* set translation table base */ asm volatile("MCR p15, 0, %[adr], c2, c0, 0"::[adr] "r" (ttb));
// set translation table base
} }
@@ -206,7 +210,8 @@ void
mmu_flush_TLB() mmu_flush_TLB()
{ {
uint32 bla = 0; uint32 bla = 0;
asm volatile("MCR p15, 0, %[c8format], c8, c7, 0"::[c8format] "r" (bla) ); /* flush TLB */ asm volatile("MCR p15, 0, %[c8format], c8, c7, 0"::[c8format] "r" (bla));
// flush TLB
} }