From 6dcf8a8bdf19bac6e3dbec2e371daabcbda71cef Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 9 Jun 2005 14:33:22 +0000 Subject: [PATCH] modified a few comments only . All my cards BTW are running OK (including NV43/PCIe), so it looks like a release can be about done. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@13029 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index cd92fa8faf..60cac11443 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -877,7 +877,7 @@ status_t nv_acc_init_dma() } /*** init DMA command buffer info ***/ - if (si->ps.card_arch >= NV40A) //main mem DMA buf test on pre-NV40 + if (si->ps.card_arch >= NV40A) //main mem DMA buf on pre-NV40 { si->dma_buffer = (void *)((char *)si->framebuffer + ((si->ps.memory_size - 1) & 0xffff8000)); @@ -1263,8 +1263,8 @@ static void nv_start_dma(void) } else { - dummy = *((uint32 *)(si->framebuffer)); /* dummy read the first adress of the framebuffer to flush MTRR-WC buffers */ + dummy = *((uint32 *)(si->framebuffer)); } /* actually start DMA to execute all commands now in buffer */