Mask io-space bit in promise_tx2 driver, the driver was broken after recent ide-adapter changes.
Replaced IDE_ADAPTER_IS_PRIMARY by IDE_ADAPTER_CHANNEL_INDEX to support more than 2 bus master channels, and made ide_adapter aware of 3rd and 4th channel when calculating bus master dma address. Fixed bus master DMA support in legacy_sata driver for tertiary and quaternary channel, channel 3 and 4 were using the DMA engine of primary and secondary channels (that might have destroyed your data). Use PCI_address_io_mask instead of ~PCI_address_space (no functional change). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23207 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -93,8 +93,8 @@ enum {
|
||||
// interrupt number (uint8)
|
||||
// can also be defined in controller node if both channels use same IRQ!
|
||||
#define IDE_ADAPTER_INTNUM "ide_adapter/irq"
|
||||
// non-zero if primary channel, else secondary channel (uint8)
|
||||
#define IDE_ADAPTER_IS_PRIMARY "ide_adapter/is_primary"
|
||||
// 0 if primary channel, 1 if secondary channel, 2 if tertiary, ... (uint8)
|
||||
#define IDE_ADAPTER_CHANNEL_INDEX "ide_adapter/channel_index"
|
||||
|
||||
|
||||
// controller node items
|
||||
@@ -177,14 +177,14 @@ typedef struct {
|
||||
status_t (*publish_channel)(device_node_handle controller_node,
|
||||
const char *channel_module_name, uint16 command_block_base,
|
||||
uint16 control_block_base, uint8 intnum, bool can_dma,
|
||||
bool is_primary, const char *name,
|
||||
uint8 channel_index, const char *name,
|
||||
io_resource_handle *resources, device_node_handle *node);
|
||||
// verify channel configuration and publish node on success
|
||||
status_t (*detect_channel)(pci_device_module_info *pci, pci_device pci_device,
|
||||
device_node_handle controller_node, const char *channel_module_name,
|
||||
bool controller_can_dma, uint16 command_block_base,
|
||||
uint16 control_block_base, uint16 bus_master_base,
|
||||
uint8 intnum, bool is_primary, const char *name,
|
||||
uint8 intnum, uint8 channel_index, const char *name,
|
||||
device_node_handle *node, bool supports_compatibility_mode);
|
||||
|
||||
// functions that must be called by init/uninit etc. of controller driver
|
||||
|
||||
@@ -80,9 +80,8 @@ enum {
|
||||
// interrupt number (uint8)
|
||||
// can also be defined in controller node if both channels use same IRQ!
|
||||
#define IDE_ADAPTER_INTNUM "ide_adapter/irq"
|
||||
// non-zero if primary channel, else secondary channel (uint8)
|
||||
#define IDE_ADAPTER_IS_PRIMARY "ide_adapter/is_primary"
|
||||
|
||||
// 0 if primary channel, 1 if secondary channel, 2 if tertiary, ... (uint8)
|
||||
#define IDE_ADAPTER_CHANNEL_INDEX "ide_adapter/channel_index"
|
||||
|
||||
// controller node items
|
||||
// io address of bus master registers (uint16)
|
||||
@@ -164,14 +163,14 @@ typedef struct {
|
||||
status_t (*publish_channel)(device_node_handle controller_node,
|
||||
const char *channel_module_name, uint16 command_block_base,
|
||||
uint16 control_block_base, uint8 intnum, bool can_dma,
|
||||
bool is_primary, const char *name,
|
||||
uint8 channel_index, const char *name,
|
||||
io_resource_handle *resources, device_node_handle *node);
|
||||
// verify channel configuration and publish node on success
|
||||
status_t (*detect_channel)(pci_device_module_info *pci, pci_device pci_device,
|
||||
device_node_handle controller_node, const char *channel_module_name,
|
||||
bool controller_can_dma, uint16 command_block_base,
|
||||
uint16 control_block_base, uint16 bus_master_base,
|
||||
uint8 intnum, bool is_primary, const char *name,
|
||||
uint8 intnum, uint8 channel_index, const char *name,
|
||||
device_node_handle *node, bool supports_compatibility_mode);
|
||||
|
||||
// functions that must be called by init/uninit etc. of controller driver
|
||||
|
||||
Reference in New Issue
Block a user