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intel_extreme: Clean up DisplayPort Port class

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* DisplayPort != DigitalPort
* i2c needs wrapped in DP AUX transaction code
* Mode-setting comes with DP link training as well
* We need to try and share DP code with radeon_hd
This commit is contained in:
Alexander von Gluck IV
2016-02-23 14:10:14 -06:00
parent 9975620612
commit 721ba9af43
3 changed files with 56 additions and 10 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+7 -7
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@@ -554,14 +554,14 @@ struct intel_free_graphics_memory {
#define CHV_DISPLAY_PORT_D (VLV_DISPLAY_BASE + 0x64300)
// DP AUX channels
#define INTEL_DPA_AUX_CTL (0x4010 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DPB_AUX_CTL (0x4110 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DPC_AUX_CTL (0x4210 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DPD_AUX_CTL (0x4310 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_A (0x4010 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DP_AUX_CTL_B (0x4110 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_C (0x4210 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_D (0x4310 | REGS_SOUTH_TRANSCODER_PORT)
#define VLV_DPB_AUX_CTL (VLV_DISPLAY_BASE + 0x64110)
#define VLV_DPC_AUX_CTL (VLV_DISPLAY_BASE + 0x64210)
#define CHV_DPC_AUX_CTL (VLV_DISPLAY_BASE + 0x64310)
#define VLV_DP_AUX_CTL_B (VLV_DISPLAY_BASE + 0x64110)
#define VLV_DP_AUX_CTL_C (VLV_DISPLAY_BASE + 0x64210)
#define CHV_DP_AUX_CTL_D (VLV_DISPLAY_BASE + 0x64310)
#define INTEL_DP_AUX_CTL_BUSY (1 << 31)
#define INTEL_DP_AUX_CTL_DONE (1 << 30)